summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/common/power_features/pg
diff options
context:
space:
mode:
authorDebarshi Dutta <ddutta@nvidia.com>2019-05-03 04:41:52 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2019-05-09 17:42:14 -0400
commit4d8ad643d67ac4044f76976c4085a35fcc5d4095 (patch)
tree6b829f294bf4a6ff453cf08edd11bdaf5e620abb /drivers/gpu/nvgpu/common/power_features/pg
parentbdaacf544127fcfaa474ccb5466aa93f81382416 (diff)
gpu: nvgpu: wait for gr.initialized before changing cg/pg
set gr.initialized to false in the beginning of gk20a_gr_reset() and set it to true at the end of successful execution of gk20a_gr_reset. Use gk20a_gr_wait_initialized() to enable/disable cg/pg functions to make sure engine is out of reset and initialized. Bug 2092051 Bug 2429295 Bug 2484211 Bug 1890287 Change-Id: Ic7b0b71382c6d852a625c603dad8609c43b7f20f Signed-off-by: Seema Khowala <seemaj@nvidia.com> Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> (cherry-picked from 7e2f124fd12caf37172f12da8de65093622941a5 in dev-kernel) Reviewed-on: https://git-master.nvidia.com/r/2111038 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/power_features/pg')
-rw-r--r--drivers/gpu/nvgpu/common/power_features/pg/pg.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/power_features/pg/pg.c b/drivers/gpu/nvgpu/common/power_features/pg/pg.c
index fa31f4e3..394c0824 100644
--- a/drivers/gpu/nvgpu/common/power_features/pg/pg.c
+++ b/drivers/gpu/nvgpu/common/power_features/pg/pg.c
@@ -46,6 +46,8 @@ int nvgpu_pg_elpg_enable(struct gk20a *g)
46 return 0; 46 return 0;
47 } 47 }
48 48
49 gk20a_gr_wait_initialized(g);
50
49 nvgpu_mutex_acquire(&g->cg_pg_lock); 51 nvgpu_mutex_acquire(&g->cg_pg_lock);
50 if (g->elpg_enabled) { 52 if (g->elpg_enabled) {
51 err = nvgpu_pmu_pg_global_enable(g, true); 53 err = nvgpu_pmu_pg_global_enable(g, true);
@@ -64,6 +66,8 @@ int nvgpu_pg_elpg_disable(struct gk20a *g)
64 return 0; 66 return 0;
65 } 67 }
66 68
69 gk20a_gr_wait_initialized(g);
70
67 nvgpu_mutex_acquire(&g->cg_pg_lock); 71 nvgpu_mutex_acquire(&g->cg_pg_lock);
68 if (g->elpg_enabled) { 72 if (g->elpg_enabled) {
69 err = nvgpu_pmu_pg_global_enable(g, false); 73 err = nvgpu_pmu_pg_global_enable(g, false);
@@ -83,6 +87,8 @@ int nvgpu_pg_elpg_set_elpg_enabled(struct gk20a *g, bool enable)
83 return 0; 87 return 0;
84 } 88 }
85 89
90 gk20a_gr_wait_initialized(g);
91
86 nvgpu_mutex_acquire(&g->cg_pg_lock); 92 nvgpu_mutex_acquire(&g->cg_pg_lock);
87 if (enable) { 93 if (enable) {
88 if (!g->elpg_enabled) { 94 if (!g->elpg_enabled) {