diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-06-15 12:25:01 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-07-02 13:19:19 -0400 |
commit | 6ea52c59b0262556edb01835eaf91b3bfcdcdd71 (patch) | |
tree | 15fcd2bf17b28cea51384a7f8b0b2044f449ecae /drivers/gpu/nvgpu/common/posix/posix-nvgpu_mem.c | |
parent | cf2ac655fdaeba5779ce9d73cbe567218a7c5a58 (diff) |
gpu: nvgpu: Implement common nvgpu_mem_rd* functions
nvgpu_mem_rd*() functions were implemented per OS. They also used
nvgpu_pramin_access_batched() and implemented a big portion of logic
for using PRAMIN in OS specific code.
Make the implementation for the functions generic. Move all PRAMIN
logic to PRAMIN and simplify the interface provided by PRAMIN.
Change-Id: I1acb9e8d7d424325dc73314d5738cb2c9ebf7692
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1753708
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/posix/posix-nvgpu_mem.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/posix/posix-nvgpu_mem.c | 59 |
1 files changed, 0 insertions, 59 deletions
diff --git a/drivers/gpu/nvgpu/common/posix/posix-nvgpu_mem.c b/drivers/gpu/nvgpu/common/posix/posix-nvgpu_mem.c index 7f3bf9f1..fa92a7c6 100644 --- a/drivers/gpu/nvgpu/common/posix/posix-nvgpu_mem.c +++ b/drivers/gpu/nvgpu/common/posix/posix-nvgpu_mem.c | |||
@@ -27,65 +27,6 @@ | |||
27 | #include <nvgpu/nvgpu_mem.h> | 27 | #include <nvgpu/nvgpu_mem.h> |
28 | 28 | ||
29 | /* | 29 | /* |
30 | * DMA memory buffers - obviously we don't really have DMA in userspace but we | ||
31 | * can emulate a lot of the DMA mem functionality for unit testing purposes. | ||
32 | */ | ||
33 | |||
34 | u32 nvgpu_mem_rd32(struct gk20a *g, struct nvgpu_mem *mem, u32 w) | ||
35 | { | ||
36 | u32 *mem_ptr = (u32 *)mem->cpu_va; | ||
37 | |||
38 | return mem_ptr[w]; | ||
39 | } | ||
40 | |||
41 | u32 nvgpu_mem_rd(struct gk20a *g, struct nvgpu_mem *mem, u32 offset) | ||
42 | { | ||
43 | if (offset & 0x3) | ||
44 | BUG(); | ||
45 | |||
46 | return nvgpu_mem_rd32(g, mem, offset >> 2); | ||
47 | } | ||
48 | |||
49 | void nvgpu_mem_rd_n(struct gk20a *g, struct nvgpu_mem *mem, u32 offset, | ||
50 | void *dest, u32 size) | ||
51 | { | ||
52 | if (offset & 0x3 || size & 0x3) | ||
53 | BUG(); | ||
54 | |||
55 | memcpy(dest, ((char *)mem->cpu_va) + offset, size); | ||
56 | } | ||
57 | |||
58 | void nvgpu_mem_wr32(struct gk20a *g, struct nvgpu_mem *mem, u32 w, u32 data) | ||
59 | { | ||
60 | u32 *mem_ptr = (u32 *)mem->cpu_va; | ||
61 | |||
62 | mem_ptr[w] = data; | ||
63 | } | ||
64 | |||
65 | void nvgpu_mem_wr(struct gk20a *g, struct nvgpu_mem *mem, u32 offset, u32 data) | ||
66 | { | ||
67 | if (offset & 0x3) | ||
68 | BUG(); | ||
69 | |||
70 | nvgpu_mem_wr32(g, mem, offset >> 2, data); | ||
71 | } | ||
72 | |||
73 | void nvgpu_mem_wr_n(struct gk20a *g, struct nvgpu_mem *mem, u32 offset, | ||
74 | void *src, u32 size) | ||
75 | { | ||
76 | if (offset & 0x3 || size & 0x3) | ||
77 | BUG(); | ||
78 | |||
79 | memcpy(((char *)mem->cpu_va) + offset, src, size); | ||
80 | } | ||
81 | |||
82 | void nvgpu_memset(struct gk20a *g, struct nvgpu_mem *mem, u32 offset, | ||
83 | u32 c, u32 size) | ||
84 | { | ||
85 | memset(((char *)mem->cpu_va) + offset, c, size); | ||
86 | } | ||
87 | |||
88 | /* | ||
89 | * These functions are somewhat meaningless. | 30 | * These functions are somewhat meaningless. |
90 | */ | 31 | */ |
91 | u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem) | 32 | u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem) |