gpu: nvgpu: falcon engine EMEM queue support

-Removed _dmem postfix to some functions which
 can be common for DMEM & EMEM queue, and
 made changes as needed.
-Defined flcn_queue_push_emem() &
 flcn_queue_pop_emem() functions to
 to read/write queue data to/from EMEM
-Defined flcn_queue_init_emem_queue()
 function to assign EMEM specific functions
 to support EMEM queue type.
-Defined QUEUE_TYPE_DMEM to support
 DMEM based queue.
-Defined QUEUE_TYPE_EMEM to support
 EMEM based queue.
-Modified nvgpu_flcn_queue_init() to call queue
 type flcn_queue_init_dmem/emem_queue()
 function to assign its ops.

JIRA NVGPU-1161

Change-Id: I06333fa318b7ca4137c977ad63f5a857e7b36cc8
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1841084
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c
index f116df13..16f9ba57 100644
--- a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c
+++ b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c
@@ -134,6 +134,7 @@ int nvgpu_pmu_queue_init(struct nvgpu_pmu *pmu,
         queue = &pmu->queue[id];
         queue->id = id;
         queue->oflag = oflag;
+        queue->queue_type = QUEUE_TYPE_DMEM;
         g->ops.pmu_ver.get_pmu_init_msg_pmu_queue_params(queue, id, init);
 
         err = nvgpu_flcn_queue_init(pmu->flcn, queue);