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| author | Peter Daifuku <pdaifuku@nvidia.com> | 2017-08-08 18:41:32 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-08-22 20:08:03 -0400 |
| commit | 2ea017da0de62df05aef3158c62c67c8367f099e (patch) | |
| tree | 8e33852d57f0f915ed68a1a40d3951d7a9e7cfa2 /drivers/gpu/nvgpu/common/pmu | |
| parent | bc87e8989ddf2f74ff2c988a25e4a81e559a5c30 (diff) | |
gpu: nvgpu: correct NUM_FBPAS
Although igpu does not have an FBPA unit, the hardware reports one, and
the ucode leaves space for one in the HWPM context save buffer. So
let NUM_FBPAS reflect this, so that registers that follow this section
in the context buffer are offset properly
JIRA EVLR-1716
Change-Id: I40105cf2ee7f92a44d1c7cc2d23a17276bbb9e84
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1535273
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/pmu')
0 files changed, 0 insertions, 0 deletions