diff options
author | Vaikundanathan S <vaikuns@nvidia.com> | 2018-04-23 07:51:58 -0400 |
---|---|---|
committer | Tejal Kudav <tkudav@nvidia.com> | 2018-06-14 09:44:06 -0400 |
commit | 054546525571dde1117376176f00511f13168f07 (patch) | |
tree | 477c3ef6d9502ce584f2588e0240a8fbd93be2a5 /drivers/gpu/nvgpu/common/pmu | |
parent | 14d8430697d6867325fc1f40eef820cca40c3d2f (diff) |
gpu: nvgpu: set gv10x boot clock
- Set gv10x boot gpcclk to 952 MHz
- Created ops to set gv10x boot gpcclk instead
of using clk arbiter to set clocks
Bug 200399373
Change-Id: Ice5956f79d4a52abf455506a798cf7b914f3d3ed
Signed-off-by: Vaikundanathan S <vaikuns@nvidia.com>
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1700788
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/pmu')
-rw-r--r-- | drivers/gpu/nvgpu/common/pmu/pmu_fw.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_fw.c b/drivers/gpu/nvgpu/common/pmu/pmu_fw.c index 1e33ecc2..a1e3dfd0 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_fw.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_fw.c | |||
@@ -1313,6 +1313,8 @@ static int nvgpu_init_pmu_fw_ver_ops(struct nvgpu_pmu *pmu) | |||
1313 | nvgpu_clk_vf_change_inject_data_fill_gv10x; | 1313 | nvgpu_clk_vf_change_inject_data_fill_gv10x; |
1314 | g->ops.pmu_ver.clk.perf_pmu_vfe_load = | 1314 | g->ops.pmu_ver.clk.perf_pmu_vfe_load = |
1315 | perf_pmu_vfe_load_gv10x; | 1315 | perf_pmu_vfe_load_gv10x; |
1316 | g->ops.pmu_ver.clk.clk_set_boot_clk = | ||
1317 | nvgpu_clk_set_boot_fll_clk_gv10x; | ||
1316 | } else { | 1318 | } else { |
1317 | g->ops.pmu_ver.get_pmu_init_msg_pmu_queue_params = | 1319 | g->ops.pmu_ver.get_pmu_init_msg_pmu_queue_params = |
1318 | get_pmu_init_msg_pmu_queue_params_v4; | 1320 | get_pmu_init_msg_pmu_queue_params_v4; |
@@ -1484,8 +1486,6 @@ static int nvgpu_init_pmu_fw_ver_ops(struct nvgpu_pmu *pmu) | |||
1484 | clk_avfs_get_vin_cal_fuse_v10; | 1486 | clk_avfs_get_vin_cal_fuse_v10; |
1485 | g->ops.pmu_ver.clk.clk_vf_change_inject_data_fill = | 1487 | g->ops.pmu_ver.clk.clk_vf_change_inject_data_fill = |
1486 | nvgpu_clk_vf_change_inject_data_fill_gp10x; | 1488 | nvgpu_clk_vf_change_inject_data_fill_gp10x; |
1487 | g->ops.pmu_ver.clk.clk_set_boot_clk = | ||
1488 | nvgpu_clk_set_boot_fll_clk_gv10x; | ||
1489 | g->ops.pmu_ver.clk.perf_pmu_vfe_load = | 1489 | g->ops.pmu_ver.clk.perf_pmu_vfe_load = |
1490 | perf_pmu_vfe_load; | 1490 | perf_pmu_vfe_load; |
1491 | break; | 1491 | break; |