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author | Sai Nikhil <snikhil@nvidia.com> | 2018-08-22 01:12:37 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-22 20:30:19 -0400 |
commit | d28a401e6d872f7ea6abb0c5cfc8f63e0235fe21 (patch) | |
tree | 66b5c4ad42135dbd9f5535fa3c86f8ecdd1a067c /drivers/gpu/nvgpu/common/pmu/pmu_perfmon.c | |
parent | 650171566bff59e9eb372f213fdce4dfbb6da5bd (diff) |
gpu: nvgpu: common: fix MISRA 10.4 violations
MISRA Rule 10.4 only allows the usage of arithmetic operations on
operands of the same essential type category.
Adding "U" at the end of the integer literals to have same type of
operands when an arithmetic operation is performed.
This fix violations where an arithmetic operation is performed on
signed and unsigned int types.
Jira NVGPU-992
Change-Id: Iab512139a025e035ec82a9dd74245bcf1f3869fb
Signed-off-by: Sai Nikhil <snikhil@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1789425
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/pmu/pmu_perfmon.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/pmu/pmu_perfmon.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_perfmon.c b/drivers/gpu/nvgpu/common/pmu/pmu_perfmon.c index 73893f2c..5d736591 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_perfmon.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_perfmon.c | |||
@@ -77,7 +77,7 @@ int nvgpu_pmu_init_perfmon(struct nvgpu_pmu *pmu) | |||
77 | 77 | ||
78 | if (!pmu->sample_buffer) { | 78 | if (!pmu->sample_buffer) { |
79 | pmu->sample_buffer = nvgpu_alloc(&pmu->dmem, | 79 | pmu->sample_buffer = nvgpu_alloc(&pmu->dmem, |
80 | 2 * sizeof(u16)); | 80 | 2U * sizeof(u16)); |
81 | } | 81 | } |
82 | if (!pmu->sample_buffer) { | 82 | if (!pmu->sample_buffer) { |
83 | nvgpu_err(g, "failed to allocate perfmon sample buffer"); | 83 | nvgpu_err(g, "failed to allocate perfmon sample buffer"); |
@@ -215,7 +215,7 @@ int nvgpu_pmu_load_norm(struct gk20a *g, u32 *load) | |||
215 | int nvgpu_pmu_load_update(struct gk20a *g) | 215 | int nvgpu_pmu_load_update(struct gk20a *g) |
216 | { | 216 | { |
217 | struct nvgpu_pmu *pmu = &g->pmu; | 217 | struct nvgpu_pmu *pmu = &g->pmu; |
218 | u16 load = 0; | 218 | u32 load = 0; |
219 | 219 | ||
220 | if (!pmu->perfmon_ready) { | 220 | if (!pmu->perfmon_ready) { |
221 | pmu->load_shadow = 0; | 221 | pmu->load_shadow = 0; |
@@ -231,8 +231,8 @@ int nvgpu_pmu_load_update(struct gk20a *g) | |||
231 | (u8 *)&load, 2 * 1, 0); | 231 | (u8 *)&load, 2 * 1, 0); |
232 | } | 232 | } |
233 | 233 | ||
234 | pmu->load_shadow = load / 10; | 234 | pmu->load_shadow = load / 10U; |
235 | pmu->load_avg = (((9*pmu->load_avg) + pmu->load_shadow) / 10); | 235 | pmu->load_avg = (((9U*pmu->load_avg) + pmu->load_shadow) / 10U); |
236 | 236 | ||
237 | return 0; | 237 | return 0; |
238 | } | 238 | } |