diff options
author | Deepak Goyal <dgoyal@nvidia.com> | 2018-01-18 01:14:47 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-01-19 02:40:02 -0500 |
commit | e0dbf3a784f6cb1a6e1c41a23123b19ec73b8708 (patch) | |
tree | d089cf84f16980034b82c53f2913bcdda452151d /drivers/gpu/nvgpu/common/pmu/pmu_ipc.c | |
parent | a57258e9b18f2f336457165391572bc477371e94 (diff) |
gpu: nvgpu: gv11b: Enable perfmon.
t19x PMU ucode uses RPC mechanism for
PERFMON commands.
- Declared "pmu_init_perfmon",
"pmu_perfmon_start_sampling",
"pmu_perfmon_stop_sampling" and
"pmu_perfmon_get_samples" in pmu ops
to differenciate for chips using RPC & legacy
cmd/msg mechanism.
- Defined and used PERFMON RPC commands for t19x
- INIT
- START
- STOP
- QUERY
- Adds RPC handler for PERFMON RPC commands.
- For guerying GPU utilization/load, we need to send PERFMON_QUERY
RPC command for gv11b.
- Enables perfmon for gv11b.
Bug 2039013
Change-Id: Ic32326f81d48f11bc772afb8fee2dee6e427a699
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1614114
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/pmu/pmu_ipc.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/pmu/pmu_ipc.c | 35 |
1 files changed, 32 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c index 829fee19..2811a4b0 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c | |||
@@ -925,8 +925,9 @@ int nvgpu_pmu_process_message(struct nvgpu_pmu *pmu) | |||
925 | nvgpu_pmu_process_init_msg(pmu, &msg); | 925 | nvgpu_pmu_process_init_msg(pmu, &msg); |
926 | if (g->ops.pmu.init_wpr_region != NULL) | 926 | if (g->ops.pmu.init_wpr_region != NULL) |
927 | g->ops.pmu.init_wpr_region(g); | 927 | g->ops.pmu.init_wpr_region(g); |
928 | |||
928 | if (nvgpu_is_enabled(g, NVGPU_PMU_PERFMON)) | 929 | if (nvgpu_is_enabled(g, NVGPU_PMU_PERFMON)) |
929 | nvgpu_pmu_init_perfmon(pmu); | 930 | g->ops.pmu.pmu_init_perfmon(pmu); |
930 | 931 | ||
931 | return 0; | 932 | return 0; |
932 | } | 933 | } |
@@ -978,6 +979,8 @@ static void pmu_rpc_handler(struct gk20a *g, struct pmu_msg *msg, | |||
978 | void *param, u32 handle, u32 status) | 979 | void *param, u32 handle, u32 status) |
979 | { | 980 | { |
980 | struct nv_pmu_rpc_header rpc; | 981 | struct nv_pmu_rpc_header rpc; |
982 | struct nvgpu_pmu *pmu = &g->pmu; | ||
983 | struct nv_pmu_rpc_struct_perfmon_query *rpc_param; | ||
981 | 984 | ||
982 | memset(&rpc, 0, sizeof(struct nv_pmu_rpc_header)); | 985 | memset(&rpc, 0, sizeof(struct nv_pmu_rpc_header)); |
983 | if (param) | 986 | if (param) |
@@ -990,10 +993,36 @@ static void pmu_rpc_handler(struct gk20a *g, struct pmu_msg *msg, | |||
990 | } | 993 | } |
991 | 994 | ||
992 | switch (msg->hdr.unit_id) { | 995 | switch (msg->hdr.unit_id) { |
996 | case PMU_UNIT_PERFMON_T18X: | ||
997 | case PMU_UNIT_PERFMON: | ||
998 | switch (rpc.function) { | ||
999 | case NV_PMU_RPC_ID_PERFMON_T18X_INIT: | ||
1000 | nvgpu_pmu_dbg(g, | ||
1001 | "reply NV_PMU_RPC_ID_PERFMON_INIT"); | ||
1002 | pmu->perfmon_ready = 1; | ||
1003 | break; | ||
1004 | case NV_PMU_RPC_ID_PERFMON_T18X_START: | ||
1005 | nvgpu_pmu_dbg(g, | ||
1006 | "reply NV_PMU_RPC_ID_PERFMON_START"); | ||
1007 | break; | ||
1008 | case NV_PMU_RPC_ID_PERFMON_T18X_STOP: | ||
1009 | nvgpu_pmu_dbg(g, | ||
1010 | "reply NV_PMU_RPC_ID_PERFMON_STOP"); | ||
1011 | break; | ||
1012 | case NV_PMU_RPC_ID_PERFMON_T18X_QUERY: | ||
1013 | nvgpu_pmu_dbg(g, | ||
1014 | "reply NV_PMU_RPC_ID_PERFMON_QUERY"); | ||
1015 | rpc_param = (struct nv_pmu_rpc_struct_perfmon_query *)param; | ||
1016 | pmu->load = rpc_param->sample_buffer[0]; | ||
1017 | pmu->perfmon_query = 1; | ||
1018 | /* set perfmon_query to 1 after load is copied */ | ||
1019 | break; | ||
1020 | } | ||
1021 | break; | ||
993 | /* TBD case will be added */ | 1022 | /* TBD case will be added */ |
994 | default: | 1023 | default: |
995 | nvgpu_err(g, " Invalid RPC response, stats 0x%x", | 1024 | nvgpu_err(g, " Invalid RPC response, stats 0x%x", |
996 | rpc.flcn_status); | 1025 | rpc.flcn_status); |
997 | break; | 1026 | break; |
998 | } | 1027 | } |
999 | 1028 | ||