gpu: nvgpu: gv100: INIT WPR region using RPC

- Created nv_pmu_rpc_struct_acr_init_wpr_region struct
- Function gv100_pmu_init_acr() to create & execute
 INIT_WPR_REGION using RPC.
- Updated gv100 HAL .init_wpr_region to point
 to gv100_pmu_init_acr()
- Added code to handle INIT_WPR_REGION ack in
RPC handler.

Change-Id: I699fa945790689e5f24ad5d3de022efb458662e0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1613290
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 10 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c
index 2811a4b0..77acbafc 100644
--- a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c
+++ b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2017-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -993,6 +993,15 @@ static void pmu_rpc_handler(struct gk20a *g, struct pmu_msg *msg,
         }
 
         switch (msg->hdr.unit_id) {
+        case PMU_UNIT_ACR:
+                switch (rpc.function) {
+                case NV_PMU_RPC_ID_ACR_INIT_WPR_REGION:
+                        nvgpu_pmu_dbg(g,
+                                "reply NV_PMU_RPC_ID_ACR_INIT_WPR_REGION");
+                        g->pmu_lsf_pmu_wpr_init_done = 1;
+                        break;
+                }
+                break;
         case PMU_UNIT_PERFMON_T18X:
         case PMU_UNIT_PERFMON:
                 switch (rpc.function) {