diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2018-03-16 14:03:23 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-28 09:46:36 -0400 |
commit | 3e5e4804f9c2bf5b914012852b56dbbbc00f8253 (patch) | |
tree | 748dcdbd358e82cf9fe9b53c078dc64c910b97da /drivers/gpu/nvgpu/common/pmu/pmu_ipc.c | |
parent | 271456272d09d6c21728cc92bedc8ec6f7f48c8b (diff) |
gpu: nvgpu: gv10x therm boardobj support
- Added support for below multiple therm sensor device & defined macros
GPC_TSOSC
GPC SCI
HBM2_SITE
HBM2_COMBINED
- Added PMU interface for listed therm sensor device
- Added nvgpu interface for listed therm sensor device
- Added construct boardobj support for listed therm sensor device
& called to update nvgpu interface.
- Updated devinit_get_therm_device_table() to read sensor info from
therm device table from vbios table & construct respective
therm device boardobj using construct_therm_device_*()
based on class_id param read from vbios table.
- Updated RPC handler to handle THERM ack request
- Updated gv100 therm ops "get_internal_sensor_limits"
to point to gp106_get_internal_sensor_limits()
Change-Id: I4b4ed501d0625cb8fc7b300c820622e40ae59fe6
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1676785
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaikundanathan S <vaikuns@nvidia.com>
Tested-by: Vaikundanathan S <vaikuns@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/pmu/pmu_ipc.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/pmu/pmu_ipc.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c index 68654a70..843a4551 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_ipc.c | |||
@@ -841,8 +841,16 @@ static void pmu_rpc_handler(struct gk20a *g, struct pmu_msg *msg, | |||
841 | nvgpu_pmu_dbg(g, "reply PMU_UNIT_PERF"); | 841 | nvgpu_pmu_dbg(g, "reply PMU_UNIT_PERF"); |
842 | break; | 842 | break; |
843 | case PMU_UNIT_THERM: | 843 | case PMU_UNIT_THERM: |
844 | nvgpu_pmu_dbg(g, "reply PMU_UNIT_THERM"); | 844 | switch (rpc.function) { |
845 | break; | 845 | case NV_PMU_RPC_ID_THERM_BOARD_OBJ_GRP_CMD: |
846 | nvgpu_pmu_dbg(g, | ||
847 | "reply NV_PMU_RPC_ID_THERM_BOARD_OBJ_GRP_CMD"); | ||
848 | break; | ||
849 | default: | ||
850 | nvgpu_pmu_dbg(g, "reply PMU_UNIT_THERM"); | ||
851 | break; | ||
852 | } | ||
853 | break; | ||
846 | /* TBD case will be added */ | 854 | /* TBD case will be added */ |
847 | default: | 855 | default: |
848 | nvgpu_err(g, " Invalid RPC response, stats 0x%x", | 856 | nvgpu_err(g, " Invalid RPC response, stats 0x%x", |