gpu: nvgpu: gv10x volt rail boardobj changes

- Created volt ops under pmu_ver to support volt_set_voltage,
  volt_get_voltage & volt_send_load_cmd_to_pmu.
- Renamed volt load, set_voltage & get_voltage gp10x method names.
- Added new volt load, set_voltage & get_voltage methods for gv10x
  using RPC & added code to handle ack in pmu_rpc_handler() along
  with struct rail_list changes.
- Updated volt ops of gp106 & gv100 to point to respective methods.
- Added member volt_dev_idx_ipc_vmin & volt_scale_exp_pwr_equ_idx to
  "struct nv_pmu_volt_volt_rail_boardobj_set" & "struct voltage_rail"
  made changes to update members as needed.
- Added member volt_scale_exp_pwr_equ_idx to
  "struct vbios_voltage_rail_table_1x_entry" to read
  value from VBIOS table & update rail boardobj set interface.
- Defines for volt RPC "NV_PMU_RPC_ID_VOLT_*"
- Define struct's volt load, set_voltage & get_voltage to execute
   volt RPC.

Change-Id: I4a41adcf7536468beaa8a73f551b1d608aabd161
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1659728
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 12 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_fw.c b/drivers/gpu/nvgpu/common/pmu/pmu_fw.c
index 6a038317..1070579e 100644
--- a/drivers/gpu/nvgpu/common/pmu/pmu_fw.c
+++ b/drivers/gpu/nvgpu/common/pmu/pmu_fw.c
@@ -1299,6 +1299,12 @@ static int nvgpu_init_pmu_fw_ver_ops(struct nvgpu_pmu *pmu)
                                 boardobjgrp_pmugetstatus_impl_v1;
                         g->ops.pmu_ver.boardobj.is_boardobjgrp_pmucmd_id_valid =
                                 is_boardobjgrp_pmucmd_id_valid_v1;
+                        g->ops.pmu_ver.volt.volt_set_voltage =
+                                nvgpu_volt_set_voltage_gv10x;
+                        g->ops.pmu_ver.volt.volt_get_voltage =
+                                nvgpu_volt_rail_get_voltage_gv10x;
+                        g->ops.pmu_ver.volt.volt_send_load_cmd_to_pmu =
+                                nvgpu_volt_send_load_cmd_to_pmu_gv10x;
                 } else {
                         g->ops.pmu_ver.get_pmu_init_msg_pmu_queue_params =
                                 get_pmu_init_msg_pmu_queue_params_v4;
@@ -1458,6 +1464,12 @@ static int nvgpu_init_pmu_fw_ver_ops(struct nvgpu_pmu *pmu)
                         boardobjgrp_pmugetstatus_impl;
                 g->ops.pmu_ver.boardobj.is_boardobjgrp_pmucmd_id_valid =
                         is_boardobjgrp_pmucmd_id_valid_v0;
+                g->ops.pmu_ver.volt.volt_set_voltage =
+                        nvgpu_volt_set_voltage_gp10x;
+                g->ops.pmu_ver.volt.volt_get_voltage =
+                        nvgpu_volt_rail_get_voltage_gp10x;
+                g->ops.pmu_ver.volt.volt_send_load_cmd_to_pmu =
+                        nvgpu_volt_send_load_cmd_to_pmu_gp10x;
                 break;
         case APP_VERSION_GM20B:
                 g->ops.pmu_ver.pg_cmd_eng_buf_load_size =