diff options
author | Tejal Kudav <tkudav@nvidia.com> | 2017-11-08 04:56:23 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-04-12 05:31:15 -0400 |
commit | 2114869a4084809be18a489dc44d1b8f28e66598 (patch) | |
tree | beb0b902d0c1424a9086a3d0f6ba04dfaebf13d0 /drivers/gpu/nvgpu/common/pmu/pmu_fw.c | |
parent | 1f4bbff6e068e4b718b69bea5b9a1c3c07f5c49a (diff) |
gpu: nvgpu: Update clk_fll interface as per chips_a
Two new members added to fll struct and code modified to support
GV100 VBIOS NAFLL tables
Add g->ops for getting vbios clk domains
JIRA NVGPUGV100-39
Change-Id: Iaabea893d55d44a272e2bce2b1d525b122cd36f5
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1594289
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Tested-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/pmu/pmu_fw.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/pmu/pmu_fw.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_fw.c b/drivers/gpu/nvgpu/common/pmu/pmu_fw.c index ea5b21ab..cac5079e 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_fw.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_fw.c | |||
@@ -1305,6 +1305,8 @@ static int nvgpu_init_pmu_fw_ver_ops(struct nvgpu_pmu *pmu) | |||
1305 | nvgpu_volt_rail_get_voltage_gv10x; | 1305 | nvgpu_volt_rail_get_voltage_gv10x; |
1306 | g->ops.pmu_ver.volt.volt_send_load_cmd_to_pmu = | 1306 | g->ops.pmu_ver.volt.volt_send_load_cmd_to_pmu = |
1307 | nvgpu_volt_send_load_cmd_to_pmu_gv10x; | 1307 | nvgpu_volt_send_load_cmd_to_pmu_gv10x; |
1308 | g->ops.pmu_ver.clk.get_vbios_clk_domain = | ||
1309 | nvgpu_clk_get_vbios_clk_domain_gv10x; | ||
1308 | } else { | 1310 | } else { |
1309 | g->ops.pmu_ver.get_pmu_init_msg_pmu_queue_params = | 1311 | g->ops.pmu_ver.get_pmu_init_msg_pmu_queue_params = |
1310 | get_pmu_init_msg_pmu_queue_params_v4; | 1312 | get_pmu_init_msg_pmu_queue_params_v4; |
@@ -1470,6 +1472,8 @@ static int nvgpu_init_pmu_fw_ver_ops(struct nvgpu_pmu *pmu) | |||
1470 | nvgpu_volt_rail_get_voltage_gp10x; | 1472 | nvgpu_volt_rail_get_voltage_gp10x; |
1471 | g->ops.pmu_ver.volt.volt_send_load_cmd_to_pmu = | 1473 | g->ops.pmu_ver.volt.volt_send_load_cmd_to_pmu = |
1472 | nvgpu_volt_send_load_cmd_to_pmu_gp10x; | 1474 | nvgpu_volt_send_load_cmd_to_pmu_gp10x; |
1475 | g->ops.pmu_ver.clk.get_vbios_clk_domain = | ||
1476 | nvgpu_clk_get_vbios_clk_domain_gp10x; | ||
1473 | break; | 1477 | break; |
1474 | case APP_VERSION_GM20B: | 1478 | case APP_VERSION_GM20B: |
1475 | g->ops.pmu_ver.pg_cmd_eng_buf_load_size = | 1479 | g->ops.pmu_ver.pg_cmd_eng_buf_load_size = |