diff options
author | Debarshi Dutta <ddutta@nvidia.com> | 2018-08-22 00:27:01 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-29 20:46:51 -0400 |
commit | 74639b444251d7adc222400625eb59a3d53d0c0a (patch) | |
tree | 19373fbe8ee522863c990fdfa0db24e6474f5167 /drivers/gpu/nvgpu/common/pmu/pmu_debug.c | |
parent | e3710e5431d8f14f1b8c2812f5c1aeeb7bdaac1c (diff) |
gpu: nvgpu: invoke calls to methods in pmu_gk20a.h via HAL
In nvgpu repository, we have multiple accesses to methods in
pmu_gk20a.h which have register accesses. Instead of directly invoking
these methods, these are now called via HALs. Some common methods such
as pmu_wait_message_cond which donot have any register accesses
are moved to pmu_ipc.c and the method declarations are moved
to pmu.h. Also, changed gm20b_pmu_dbg to
nvgpu_dbg_pmu all across the code base. This would remove all
indirect dependencies via gk20a.h into pmu_gk20a.h. As a result
pmu_gk20a.h is now removed from gk20a.h
JIRA-597
Change-Id: Id54b2684ca39362fda7626238c3116cd49e92080
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1804283
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/pmu/pmu_debug.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/pmu/pmu_debug.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu_debug.c b/drivers/gpu/nvgpu/common/pmu/pmu_debug.c index 6ad82ca8..68a39432 100644 --- a/drivers/gpu/nvgpu/common/pmu/pmu_debug.c +++ b/drivers/gpu/nvgpu/common/pmu/pmu_debug.c | |||
@@ -39,7 +39,7 @@ void nvgpu_pmu_dump_elpg_stats(struct nvgpu_pmu *pmu) | |||
39 | pmu->stat_dmem_offset[PMU_PG_ELPG_ENGINE_ID_GRAPHICS], | 39 | pmu->stat_dmem_offset[PMU_PG_ELPG_ENGINE_ID_GRAPHICS], |
40 | sizeof(struct pmu_pg_stats_v2)); | 40 | sizeof(struct pmu_pg_stats_v2)); |
41 | 41 | ||
42 | gk20a_pmu_dump_elpg_stats(pmu); | 42 | g->ops.pmu.pmu_dump_elpg_stats(pmu); |
43 | } | 43 | } |
44 | 44 | ||
45 | void nvgpu_pmu_dump_falcon_stats(struct nvgpu_pmu *pmu) | 45 | void nvgpu_pmu_dump_falcon_stats(struct nvgpu_pmu *pmu) |
@@ -47,7 +47,7 @@ void nvgpu_pmu_dump_falcon_stats(struct nvgpu_pmu *pmu) | |||
47 | struct gk20a *g = pmu->g; | 47 | struct gk20a *g = pmu->g; |
48 | 48 | ||
49 | nvgpu_flcn_dump_stats(pmu->flcn); | 49 | nvgpu_flcn_dump_stats(pmu->flcn); |
50 | gk20a_pmu_dump_falcon_stats(pmu); | 50 | g->ops.pmu.pmu_dump_falcon_stats(pmu); |
51 | 51 | ||
52 | nvgpu_err(g, "pmu state: %d", pmu->pmu_state); | 52 | nvgpu_err(g, "pmu state: %d", pmu->pmu_state); |
53 | nvgpu_err(g, "elpg state: %d", pmu->elpg_stat); | 53 | nvgpu_err(g, "elpg state: %d", pmu->elpg_stat); |