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authorMahantesh Kumbar <mkumbar@nvidia.com>2017-11-15 06:07:27 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-11-20 03:34:22 -0500
commitf53a0dd96b25cfb64b17ab816ae1f9b0b144db07 (patch)
treef7a781724f0e1ed2ba20f7c1f945ae8d6d076a91 /drivers/gpu/nvgpu/common/pmu/pmu.c
parent76ad8e9fa8726fd3070aaaecfb942c1991359f0e (diff)
gpu: nvgpu: falcon interface update
-Added nvgpu_flcn_mem_scrub_wait() to falcon interface layer to poll imem/dmem scrubbing status complete check for 1msec with status check interval of 10usec. -Called nvgpu_flcn_mem_scrub_wait() in falcon reset interface to check scrubbing status upon falcon/engine reset. -Replaced mem scrubbing wait check code in pmu_enable_hw() by calling nvgpu_flcn_mem_scrub_wait() Bug 200346134 Change-Id: Iac68e24dea466f6dd5facc371947269db64d238d Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1598644 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/pmu/pmu.c')
-rw-r--r--drivers/gpu/nvgpu/common/pmu/pmu.c34
1 files changed, 10 insertions, 24 deletions
diff --git a/drivers/gpu/nvgpu/common/pmu/pmu.c b/drivers/gpu/nvgpu/common/pmu/pmu.c
index d595097b..e96ea090 100644
--- a/drivers/gpu/nvgpu/common/pmu/pmu.c
+++ b/drivers/gpu/nvgpu/common/pmu/pmu.c
@@ -31,15 +31,11 @@
31 31
32#include "gk20a/gk20a.h" 32#include "gk20a/gk20a.h"
33 33
34#define PMU_MEM_SCRUBBING_TIMEOUT_MAX 1000
35#define PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT 10
36
37static int nvgpu_pg_init_task(void *arg); 34static int nvgpu_pg_init_task(void *arg);
38 35
39static int pmu_enable_hw(struct nvgpu_pmu *pmu, bool enable) 36static int pmu_enable_hw(struct nvgpu_pmu *pmu, bool enable)
40{ 37{
41 struct gk20a *g = pmu->g; 38 struct gk20a *g = pmu->g;
42 struct nvgpu_timeout timeout;
43 int err = 0; 39 int err = 0;
44 40
45 nvgpu_log_fn(g, " %s ", g->name); 41 nvgpu_log_fn(g, " %s ", g->name);
@@ -56,29 +52,19 @@ static int pmu_enable_hw(struct nvgpu_pmu *pmu, bool enable)
56 g->ops.clock_gating.blcg_pmu_load_gating_prod(g, 52 g->ops.clock_gating.blcg_pmu_load_gating_prod(g,
57 g->blcg_enabled); 53 g->blcg_enabled);
58 54
59 /* check for PMU IMEM/DMEM scrubbing complete status */ 55 if (nvgpu_flcn_mem_scrub_wait(pmu->flcn)) {
60 nvgpu_timeout_init(g, &timeout, 56 /* keep PMU falcon/engine in reset
61 PMU_MEM_SCRUBBING_TIMEOUT_MAX / 57 * if IMEM/DMEM scrubbing fails
62 PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT, 58 */
63 NVGPU_TIMER_RETRY_TIMER); 59 g->ops.pmu.reset_engine(g, false);
64 do { 60 nvgpu_err(g, "Falcon mem scrubbing timeout");
65 if (nvgpu_flcn_get_mem_scrubbing_status(pmu->flcn)) 61 err = -ETIMEDOUT;
66 goto exit; 62 }
67 63 } else {
68 nvgpu_udelay(PMU_MEM_SCRUBBING_TIMEOUT_DEFAULT);
69 } while (!nvgpu_timeout_expired(&timeout));
70
71 /* keep PMU falcon/engine in reset
72 * if IMEM/DMEM scrubbing fails
73 */
74 g->ops.pmu.reset_engine(g, false);
75 nvgpu_err(g, "Falcon mem scrubbing timeout");
76 err = -ETIMEDOUT;
77 } else
78 /* keep PMU falcon/engine in reset */ 64 /* keep PMU falcon/engine in reset */
79 g->ops.pmu.reset_engine(g, false); 65 g->ops.pmu.reset_engine(g, false);
66 }
80 67
81exit:
82 nvgpu_log_fn(g, "%s Done, status - %d ", g->name, err); 68 nvgpu_log_fn(g, "%s Done, status - %d ", g->name, err);
83 return err; 69 return err;
84} 70}