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authorseshendra Gadagottu <sgadagottu@nvidia.com>2017-10-05 20:36:51 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-10-23 13:46:11 -0400
commit9712b4e5acae10b599c68417bfde044895b2d33d (patch)
tree46243d4f6ef6488ae1274b83d6cb160afe316749 /drivers/gpu/nvgpu/common/mm
parent1760dc8e805ca667366a0ddeca8a72dd9859d11d (diff)
gpu: nvgpu: enhance class error debug info
Updated gk20a_gr_handle_class_error with sub channel info, mme related info. Also printing the correct method info from isr_data->offset by left shifting it by 2. Generated following hw definitions for gk20a/gm20b/gp10b/gp106 to dump relevant data in gk20a_gr_handle_class_error: gr_trapped_addr_mme_generated_v gr_trapped_addr_datahigh_v gr_trapped_addr_priv_v gr_trapped_data_lo_r gr_trapped_data_mme_r gr_trapped_data_mme_pc_v Bug 2003671 Change-Id: I02e15ef16d7498b6a7dc2af547a14e84d570e8a7 Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1574061 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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