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authorAlex Waterman <alexw@nvidia.com>2018-08-03 13:36:30 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-08-15 00:25:05 -0400
commit32127c65151ffc7288ff8483d5b18be77a662b0b (patch)
treeda8bbd9e7f380a6bb9551499b75795d7b8e3cf68 /drivers/gpu/nvgpu/common/mm
parent2a25d03f2b7ad0700f14640282abd72ff587d800 (diff)
gpu: nvgpu: Use NVLINK config instead of has_physical_mode
This flag - has_physical_mode - doesn't seem to do much other than force the PTE/PDE and inst block addresses to be physical instead of potentially IOMMUed. There is a reason to do this on volta (nvlink not being IOMMU'able being the primary reason) but this flag is too general it seems. The flag was being enabled on all native platforms. The problem is that some page tables (the maxwell small page directories) could be larger than 4KB which meant that the allocation used for them could be potentially discontiguous. Discontiguous page directories obviously is incorrect. This patch deletes the has_physical_mode flag and instead replaces the places where it's checked with a check for nvlink being enabled. Since we _do_ want to program phyiscal PDEs and PTEs for NVLINK devices (regardless of IOMMU status they always access memory by physical address) we need a check for NVLINK state. Bug 200414723 Change-Id: I09ad86b12d8aabcf9648a22503f4747fd63514dd Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1792163 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/mm')
-rw-r--r--drivers/gpu/nvgpu/common/mm/gmmu.c5
-rw-r--r--drivers/gpu/nvgpu/common/mm/mm.c5
2 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/common/mm/gmmu.c b/drivers/gpu/nvgpu/common/mm/gmmu.c
index 4e723e2e..f6f2b9ad 100644
--- a/drivers/gpu/nvgpu/common/mm/gmmu.c
+++ b/drivers/gpu/nvgpu/common/mm/gmmu.c
@@ -215,10 +215,11 @@ static u64 nvgpu_pde_phys_addr(struct gk20a *g, struct nvgpu_gmmu_pd *pd)
215{ 215{
216 u64 page_addr; 216 u64 page_addr;
217 217
218 if (g->mm.has_physical_mode) 218 if (nvgpu_is_enabled(g, NVGPU_SUPPORT_NVLINK)) {
219 page_addr = nvgpu_mem_get_phys_addr(g, pd->mem); 219 page_addr = nvgpu_mem_get_phys_addr(g, pd->mem);
220 else 220 } else {
221 page_addr = nvgpu_mem_get_addr(g, pd->mem); 221 page_addr = nvgpu_mem_get_addr(g, pd->mem);
222 }
222 223
223 return page_addr + pd->mem_offs; 224 return page_addr + pd->mem_offs;
224} 225}
diff --git a/drivers/gpu/nvgpu/common/mm/mm.c b/drivers/gpu/nvgpu/common/mm/mm.c
index 42d708ee..2c3a1cd6 100644
--- a/drivers/gpu/nvgpu/common/mm/mm.c
+++ b/drivers/gpu/nvgpu/common/mm/mm.c
@@ -128,10 +128,11 @@ int nvgpu_mm_suspend(struct gk20a *g)
128 128
129u64 nvgpu_inst_block_addr(struct gk20a *g, struct nvgpu_mem *inst_block) 129u64 nvgpu_inst_block_addr(struct gk20a *g, struct nvgpu_mem *inst_block)
130{ 130{
131 if (g->mm.has_physical_mode) 131 if (nvgpu_is_enabled(g, NVGPU_SUPPORT_NVLINK)) {
132 return nvgpu_mem_get_phys_addr(g, inst_block); 132 return nvgpu_mem_get_phys_addr(g, inst_block);
133 else 133 } else {
134 return nvgpu_mem_get_addr(g, inst_block); 134 return nvgpu_mem_get_addr(g, inst_block);
135 }
135} 136}
136 137
137void nvgpu_free_inst_block(struct gk20a *g, struct nvgpu_mem *inst_block) 138void nvgpu_free_inst_block(struct gk20a *g, struct nvgpu_mem *inst_block)