diff options
author | Alex Waterman <alexw@nvidia.com> | 2018-01-16 19:38:19 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-01-19 20:29:09 -0500 |
commit | 137006fe783a0829a26f4f179f19f3d73fc050c4 (patch) | |
tree | cc98030557d355cad4da6c7216440d6e5d3ee4b7 /drivers/gpu/nvgpu/common/mm/vm.c | |
parent | c713934675b32b30f3939f3ab4dd7466eb96a523 (diff) |
gpu: nvgpu: Update gk20a pde bit coverage function
The mm_gk20a.c function that returns number of bits that a PDE covers
is very useful for determing PDE size for all chips. Copy this into
the common VM code since this applies to all chips/platforms.
Bug 200105199
Change-Id: I437da4781be2fa7c540abe52b20f4c4321f6c649
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1639730
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/mm/vm.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/mm/vm.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/mm/vm.c b/drivers/gpu/nvgpu/common/mm/vm.c index e90437a3..19cc9fc5 100644 --- a/drivers/gpu/nvgpu/common/mm/vm.c +++ b/drivers/gpu/nvgpu/common/mm/vm.c | |||
@@ -60,6 +60,26 @@ int vm_aspace_id(struct vm_gk20a *vm) | |||
60 | return vm->as_share ? vm->as_share->id : -1; | 60 | return vm->as_share ? vm->as_share->id : -1; |
61 | } | 61 | } |
62 | 62 | ||
63 | /* | ||
64 | * Determine how many bits of the address space each last level PDE covers. For | ||
65 | * example, for gp10b, with a last level address bit PDE range of 28 to 21 the | ||
66 | * amount of memory each last level PDE addresses is 21 bits - i.e 2MB. | ||
67 | */ | ||
68 | int nvgpu_vm_pde_coverage_bit_count(struct vm_gk20a *vm) | ||
69 | { | ||
70 | int final_pde_level = 0; | ||
71 | |||
72 | /* | ||
73 | * Find the second to last level of the page table programming | ||
74 | * heirarchy: the last level is PTEs so we really want the level | ||
75 | * before that which is the last level of PDEs. | ||
76 | */ | ||
77 | while (vm->mmu_levels[final_pde_level + 2].update_entry) | ||
78 | final_pde_level++; | ||
79 | |||
80 | return vm->mmu_levels[final_pde_level].lo_bit[0]; | ||
81 | } | ||
82 | |||
63 | static void __nvgpu_vm_free_entries(struct vm_gk20a *vm, | 83 | static void __nvgpu_vm_free_entries(struct vm_gk20a *vm, |
64 | struct nvgpu_gmmu_pd *pd, | 84 | struct nvgpu_gmmu_pd *pd, |
65 | int level) | 85 | int level) |