gpu: nvgpu: Make buf alignment generic

Drastically simplify and move the aligment computation for buffers
getting mapped into the SGT code. An SGT is all that is needed for
computing the alignment.

However, this did require that a new SGT op was added:

  nvgpu_sgt_iommuable()

This function returns true if the passed SGT is IOMMU'able and must
be implemented by an SGT implementation that has IOMMU'able buffers.
If this function is left as NULL then it is assumed that the buffer
is not IOMMU'able.

Also cleanup the parameter ordering convention among all nvgpu_sgt
functions. Previously there was a mishmash of different parameter
orderings. This patch now standardizes on the gk20a first approach
seen everywhere else in the driver.

JIRA NVGPU-30
JIRA NVGPU-246
JIRA NVGPU-71

Change-Id: Ic4ab7b752847cf795c7cfafed5a07818217bba86
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1583985
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 50 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c b/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c
index 9f677058..b4e718b4 100644
--- a/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c
+++ b/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c
@@ -47,13 +47,20 @@ u64 nvgpu_sgt_get_length(struct nvgpu_sgt *sgt, void *sgl)
         return sgt->ops->sgl_length(sgl);
 }
 
-u64 nvgpu_sgt_get_gpu_addr(struct nvgpu_sgt *sgt, struct gk20a *g, void *sgl,
+u64 nvgpu_sgt_get_gpu_addr(struct gk20a *g, struct nvgpu_sgt *sgt, void *sgl,
                            struct nvgpu_gmmu_attrs *attrs)
 {
         return sgt->ops->sgl_gpu_addr(g, sgl, attrs);
 }
 
-void nvgpu_sgt_free(struct nvgpu_sgt *sgt, struct gk20a *g)
+bool nvgpu_sgt_iommuable(struct gk20a *g, struct nvgpu_sgt *sgt)
+{
+        if (sgt->ops->sgt_iommuable)
+                return sgt->ops->sgt_iommuable(g, sgt);
+        return false;
+}
+
+void nvgpu_sgt_free(struct gk20a *g, struct nvgpu_sgt *sgt)
 {
         if (sgt && sgt->ops->sgt_free)
                 sgt->ops->sgt_free(g, sgt);
@@ -69,3 +76,44 @@ u64 nvgpu_mem_iommu_translate(struct gk20a *g, u64 phys)
 
         return phys;
 }
+
+/*
+ * Determine alignment for a passed buffer. Necessary since the buffer may
+ * appear big enough to map with large pages but the SGL may have chunks that
+ * are not aligned on a 64/128kB large page boundary. There's also the
+ * possibility chunks are odd sizes which will necessitate small page mappings
+ * to correctly glue them together into a contiguous virtual mapping.
+ */
+u64 nvgpu_sgt_alignment(struct gk20a *g, struct nvgpu_sgt *sgt)
+{
+        u64 align = 0, chunk_align = 0;
+        void *sgl;
+
+        /*
+         * If this SGT is iommuable and we want to use the IOMMU address then
+         * the SGT's first entry has the IOMMU address. We will align on this
+         * and double check length of buffer later. Also, since there's an
+         * IOMMU we know that this DMA address is contiguous.
+         */
+        if (!g->mm.bypass_smmu &&
+            nvgpu_sgt_iommuable(g, sgt) &&
+            nvgpu_sgt_get_dma(sgt, sgt->sgl))
+                return 1ULL << __ffs(nvgpu_sgt_get_dma(sgt, sgt->sgl));
+
+        /*
+         * Otherwise the buffer is not iommuable (VIDMEM, for example) or we are
+         * bypassing the IOMMU and need to use the underlying physical entries
+         * of the SGT.
+         */
+        nvgpu_sgt_for_each_sgl(sgl, sgt) {
+                chunk_align = 1ULL << __ffs(nvgpu_sgt_get_phys(sgt, sgl) |
+                                            nvgpu_sgt_get_length(sgt, sgl));
+
+                if (align)
+                        align = min(align, chunk_align);
+                else
+                        align = chunk_align;
+        }
+
+        return align;
+}