diff options
author | Alex Waterman <alexw@nvidia.com> | 2017-08-16 19:19:53 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-10-04 05:21:47 -0400 |
commit | edb116661348f1bc843849cdcc318fa47cf9724a (patch) | |
tree | 61d978a3518a51bdb82e2d3681abf5fc9c75821e /drivers/gpu/nvgpu/common/mm/nvgpu_mem.c | |
parent | 2559fa295d0c478466e47496174fa2108ab01c33 (diff) |
gpu: nvgpu: rename ops.mm.get_physical_addr_bits
Rename get_physical_addr_bits and related functions to something that
more clearly conveys what they are doing. The basic idea of these
functions is to translate from a physical GPU address to a IOMMU GPU
address. To do that a particular bit (that varies from chip to chip)
is added to the physical address.
JIRA NVGPU-68
Change-Id: I536cc595c4397aad69a24f740bc74db03f52bc0a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1542966
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/mm/nvgpu_mem.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/mm/nvgpu_mem.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c b/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c index 52d20883..faee482d 100644 --- a/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c +++ b/drivers/gpu/nvgpu/common/mm/nvgpu_mem.c | |||
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | #include <nvgpu/kmem.h> | 23 | #include <nvgpu/kmem.h> |
24 | #include <nvgpu/nvgpu_mem.h> | 24 | #include <nvgpu/nvgpu_mem.h> |
25 | #include <nvgpu/dma.h> | ||
25 | 26 | ||
26 | #include "gk20a/gk20a.h" | 27 | #include "gk20a/gk20a.h" |
27 | 28 | ||
@@ -56,3 +57,14 @@ void nvgpu_sgt_free(struct nvgpu_sgt *sgt, struct gk20a *g) | |||
56 | if (sgt && sgt->ops->sgt_free) | 57 | if (sgt && sgt->ops->sgt_free) |
57 | sgt->ops->sgt_free(g, sgt); | 58 | sgt->ops->sgt_free(g, sgt); |
58 | } | 59 | } |
60 | |||
61 | u64 nvgpu_mem_iommu_translate(struct gk20a *g, u64 phys) | ||
62 | { | ||
63 | /* ensure it is not vidmem allocation */ | ||
64 | WARN_ON(is_vidmem_page_alloc(phys)); | ||
65 | |||
66 | if (nvgpu_iommuable(g) && g->ops.mm.get_iommu_bit) | ||
67 | return phys | 1ULL << g->ops.mm.get_iommu_bit(g); | ||
68 | |||
69 | return phys; | ||
70 | } | ||