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authorSai Nikhil <snikhil@nvidia.com>2018-08-17 01:20:17 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-08-29 11:59:31 -0400
commit2f97e683feed3c3ba3c8722c4f6ab7466bcef0c0 (patch)
treec0f90c3dc6909122cfde071efff8ff24d2b61471 /drivers/gpu/nvgpu/common/mm/bitmap_allocator.c
parent19cd7ffb5def933db323fe682ec4a263eb1923f9 (diff)
gpu: nvgpu: common: fix MISRA Rule 10.4
MISRA Rule 10.4 only allows the usage of arithmetic operations on operands of the same essential type category. Adding "U" at the end of the integer literals to have same type of operands when an arithmetic operation is performed. This fix violations where an arithmetic operation is performed on signed and unsigned int types. In balloc_get_order_list() the argument "int order" has been changed to a u64 because all callers of this function pass a u64 argument. JIRA NVGPU-992 Change-Id: Ie2964f9f1dfb2865a9bd6e6cdd65e7cda6c1f638 Signed-off-by: Sai Nikhil <snikhil@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1784419 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/mm/bitmap_allocator.c')
-rw-r--r--drivers/gpu/nvgpu/common/mm/bitmap_allocator.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/common/mm/bitmap_allocator.c b/drivers/gpu/nvgpu/common/mm/bitmap_allocator.c
index 5316783d..1edfda51 100644
--- a/drivers/gpu/nvgpu/common/mm/bitmap_allocator.c
+++ b/drivers/gpu/nvgpu/common/mm/bitmap_allocator.c
@@ -378,7 +378,7 @@ int nvgpu_bitmap_allocator_init(struct gk20a *g, struct nvgpu_allocator *na,
378 int err; 378 int err;
379 struct nvgpu_bitmap_allocator *a; 379 struct nvgpu_bitmap_allocator *a;
380 380
381 if (WARN_ON(blk_size & (blk_size - 1))) { 381 if (WARN_ON(blk_size & (blk_size - 1U))) {
382 return -EINVAL; 382 return -EINVAL;
383 } 383 }
384 384
@@ -386,12 +386,12 @@ int nvgpu_bitmap_allocator_init(struct gk20a *g, struct nvgpu_allocator *na,
386 * blk_size must be a power-of-2; base length also need to be aligned 386 * blk_size must be a power-of-2; base length also need to be aligned
387 * to blk_size. 387 * to blk_size.
388 */ 388 */
389 if (blk_size & (blk_size - 1) || 389 if (blk_size & (blk_size - 1U) ||
390 base & (blk_size - 1) || length & (blk_size - 1)) { 390 base & (blk_size - 1U) || length & (blk_size - 1U)) {
391 return -EINVAL; 391 return -EINVAL;
392 } 392 }
393 393
394 if (base == 0) { 394 if (base == 0U) {
395 base = blk_size; 395 base = blk_size;
396 length -= blk_size; 396 length -= blk_size;
397 } 397 }