diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-08-30 17:05:16 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-13 22:18:24 -0400 |
commit | 7ac0b046a538daa1a3532d3d5ae7cba1ef3295ba (patch) | |
tree | 79e42a4abe1e0c7d2918fa588f50061b90ee3e5f /drivers/gpu/nvgpu/common/mc/mc_gm20b.h | |
parent | bf14c2a0faf922073eaf72d490bf8bde8df1a5c7 (diff) |
gpu: nvgpu: Move MC HAL to common
Move implementation of MC HAL to common/mc. Also bump gk20a
implementation to gm20b.
gk20a_mc_boot_0 was used via a HAL, but we have only one possible
implementation. It also has to be anyway called directly to detect
which HALs to assign, so make it a true common function.
mc_gk20a_handle_intr_nonstall was also used only in os/linux/intr.c
so move it there.
JIRA NVGPU-954
Change-Id: I79aedc9158f90d578db0edc17b714617b52690ac
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1813519
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/mc/mc_gm20b.h')
-rw-r--r-- | drivers/gpu/nvgpu/common/mc/mc_gm20b.h | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/mc/mc_gm20b.h b/drivers/gpu/nvgpu/common/mc/mc_gm20b.h new file mode 100644 index 00000000..6700a48c --- /dev/null +++ b/drivers/gpu/nvgpu/common/mc/mc_gm20b.h | |||
@@ -0,0 +1,51 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | #ifndef NVGPU_MC_GM20B_H | ||
24 | #define NVGPU_MC_GM20B_H | ||
25 | |||
26 | #include <nvgpu/types.h> | ||
27 | |||
28 | struct gk20a; | ||
29 | enum nvgpu_unit; | ||
30 | |||
31 | void gm20b_mc_intr_mask(struct gk20a *g); | ||
32 | void gm20b_mc_intr_enable(struct gk20a *g); | ||
33 | void gm20b_mc_intr_unit_config(struct gk20a *g, bool enable, | ||
34 | bool is_stalling, u32 mask); | ||
35 | void gm20b_mc_isr_stall(struct gk20a *g); | ||
36 | u32 gm20b_mc_intr_stall(struct gk20a *g); | ||
37 | void gm20b_mc_intr_stall_pause(struct gk20a *g); | ||
38 | void gm20b_mc_intr_stall_resume(struct gk20a *g); | ||
39 | u32 gm20b_mc_intr_nonstall(struct gk20a *g); | ||
40 | u32 gm20b_mc_isr_nonstall(struct gk20a *g); | ||
41 | void gm20b_mc_intr_nonstall_pause(struct gk20a *g); | ||
42 | void gm20b_mc_intr_nonstall_resume(struct gk20a *g); | ||
43 | void gm20b_mc_enable(struct gk20a *g, u32 units); | ||
44 | void gm20b_mc_disable(struct gk20a *g, u32 units); | ||
45 | void gm20b_mc_reset(struct gk20a *g, u32 units); | ||
46 | bool gm20b_mc_is_intr1_pending(struct gk20a *g, | ||
47 | enum nvgpu_unit unit, u32 mc_intr_1); | ||
48 | void gm20b_mc_log_pending_intrs(struct gk20a *g); | ||
49 | void gm20b_mc_handle_intr_nonstall(struct gk20a *g, u32 ops); | ||
50 | |||
51 | #endif /* NVGPU_MC_GM20B_H */ | ||