diff options
author | Konsta Holtta <kholtta@nvidia.com> | 2018-02-21 09:42:37 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-03-09 23:09:44 -0500 |
commit | cb6ed949e272f8ad753bf4ab1c0d20c35f31498b (patch) | |
tree | 16d0acad2430e77f9241abe93fae61937e317373 /drivers/gpu/nvgpu/common/linux | |
parent | 4f9368522ea18e3734798d2032b21c58dbb93a04 (diff) |
gpu: nvgpu: support per-channel wdt timeouts
Replace the padding in nvgpu_channel_wdt_args with a timeout value in
milliseconds, and add NVGPU_IOCTL_CHANNEL_WDT_FLAG_SET_TIMEOUT to
signify the existence of this new field. When the new flag is included
in the value of wdt_status, the field is used to set a per-channel
timeout to override the per-GPU default.
Add NVGPU_IOCTL_CHANNEL_WDT_FLAG_DISABLE_DUMP to disable the long debug
dump when a timed out channel gets recovered by the watchdog. Printing
the dump to serial console takes easily several seconds. (Note that
there is NVGPU_TIMEOUT_FLAG_DISABLE_DUMP about ctxsw timeout separately
for NVGPU_IOCTL_CHANNEL_SET_TIMEOUT_EX as well.)
The behaviour of NVGPU_IOCTL_CHANNEL_WDT is changed so that either
NVGPU_IOCTL_CHANNEL_ENABLE_WDT or NVGPU_IOCTL_CHANNEL_DISABLE_WDT has to
be set. The old behaviour was that other values were silently ignored.
The usage of the global default debugfs-controlled ch_wdt_timeout_ms is
changed so that its value takes effect only for newly opened channels
instead of in realtime. Also, zero value no longer means that the
watchdog is disabled; there is a separate flag for that after all.
gk20a_fifo_recover_tsg used to ignore the value of "verbose" when no
engines were found. Correct this.
Bug 1982826
Bug 1985845
Jira NVGPU-73
Change-Id: Iea6213a646a66cb7c631ed7d7c91d8c2ba8a92a4
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1510898
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/channel.c | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_channel.c | 19 |
2 files changed, 17 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/channel.c b/drivers/gpu/nvgpu/common/linux/channel.c index 8bfa4cfc..ea294738 100644 --- a/drivers/gpu/nvgpu/common/linux/channel.c +++ b/drivers/gpu/nvgpu/common/linux/channel.c | |||
@@ -753,7 +753,7 @@ int gk20a_submit_channel_gpfifo(struct channel_gk20a *c, | |||
753 | */ | 753 | */ |
754 | need_job_tracking = (flags & NVGPU_SUBMIT_GPFIFO_FLAGS_FENCE_WAIT) || | 754 | need_job_tracking = (flags & NVGPU_SUBMIT_GPFIFO_FLAGS_FENCE_WAIT) || |
755 | (flags & NVGPU_SUBMIT_GPFIFO_FLAGS_FENCE_GET) || | 755 | (flags & NVGPU_SUBMIT_GPFIFO_FLAGS_FENCE_GET) || |
756 | c->wdt_enabled || | 756 | c->timeout.enabled || |
757 | (g->can_railgate && !c->deterministic) || | 757 | (g->can_railgate && !c->deterministic) || |
758 | !skip_buffer_refcounting; | 758 | !skip_buffer_refcounting; |
759 | 759 | ||
@@ -791,7 +791,7 @@ int gk20a_submit_channel_gpfifo(struct channel_gk20a *c, | |||
791 | */ | 791 | */ |
792 | need_deferred_cleanup = !c->deterministic || | 792 | need_deferred_cleanup = !c->deterministic || |
793 | need_sync_framework || | 793 | need_sync_framework || |
794 | c->wdt_enabled || | 794 | c->timeout.enabled || |
795 | (g->can_railgate && | 795 | (g->can_railgate && |
796 | !c->deterministic) || | 796 | !c->deterministic) || |
797 | !skip_buffer_refcounting; | 797 | !skip_buffer_refcounting; |
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c index 0acaa61d..01355b78 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c | |||
@@ -319,10 +319,21 @@ static int gk20a_channel_cycle_stats_snapshot(struct channel_gk20a *ch, | |||
319 | static int gk20a_channel_set_wdt_status(struct channel_gk20a *ch, | 319 | static int gk20a_channel_set_wdt_status(struct channel_gk20a *ch, |
320 | struct nvgpu_channel_wdt_args *args) | 320 | struct nvgpu_channel_wdt_args *args) |
321 | { | 321 | { |
322 | if (args->wdt_status == NVGPU_IOCTL_CHANNEL_DISABLE_WDT) | 322 | u32 status = args->wdt_status & (NVGPU_IOCTL_CHANNEL_DISABLE_WDT | |
323 | ch->wdt_enabled = false; | 323 | NVGPU_IOCTL_CHANNEL_ENABLE_WDT); |
324 | else if (args->wdt_status == NVGPU_IOCTL_CHANNEL_ENABLE_WDT) | 324 | |
325 | ch->wdt_enabled = true; | 325 | if (status == NVGPU_IOCTL_CHANNEL_DISABLE_WDT) |
326 | ch->timeout.enabled = false; | ||
327 | else if (status == NVGPU_IOCTL_CHANNEL_ENABLE_WDT) | ||
328 | ch->timeout.enabled = true; | ||
329 | else | ||
330 | return -EINVAL; | ||
331 | |||
332 | if (args->wdt_status & NVGPU_IOCTL_CHANNEL_WDT_FLAG_SET_TIMEOUT) | ||
333 | ch->timeout.limit_ms = args->timeout_ms; | ||
334 | |||
335 | ch->timeout.debug_dump = (args->wdt_status & | ||
336 | NVGPU_IOCTL_CHANNEL_WDT_FLAG_DISABLE_DUMP) == 0; | ||
326 | 337 | ||
327 | return 0; | 338 | return 0; |
328 | } | 339 | } |