gpu: nvgpu: Remove bare channel scheduling

Remove scheduling IOCTL implementations for bare channels. Also
removes code that constructs bare channels in runlist.

Bug 1842197

Change-Id: I6e833b38e24a2f2c45c7993edf939d365eaf41f0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1627326
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

7 files changed, 15 insertions, 109 deletions

diff --git a/drivers/gpu/nvgpu/common/linux/debug_fifo.c b/drivers/gpu/nvgpu/common/linux/debug_fifo.c
index 94a16b70..ad157ee7 100644
--- a/drivers/gpu/nvgpu/common/linux/debug_fifo.c
+++ b/drivers/gpu/nvgpu/common/linux/debug_fifo.c
@@ -81,16 +81,16 @@ static int gk20a_fifo_sched_debugfs_seq_show(
                 return ret;
 
         if (gk20a_channel_get(ch)) {
-                if (gk20a_is_channel_marked_as_tsg(ch))
-                        tsg = &f->tsg[ch->tsgid];
+                tsg = tsg_gk20a_from_ch(ch);
 
-                seq_printf(s, "%-8d %-8d %-8d %-9d %-8d %-10d %-8d %-8d\n",
+                if (tsg)
+                        seq_printf(s, "%-8d %-8d %-8d %-9d %-8d %-10d %-8d %-8d\n",
                                 ch->chid,
                                 ch->tsgid,
                                 ch->tgid,
-                                tsg ? tsg->timeslice_us : ch->timeslice_us,
+                                tsg->timeslice_us,
                                 ch->timeout_ms_max,
-                                tsg ? tsg->interleave_level : ch->interleave_level,
+                                tsg->interleave_level,
                                 ch->ch_ctx.gr_ctx ? ch->ch_ctx.gr_ctx->graphics_preempt_mode : U32_MAX,
                                 ch->ch_ctx.gr_ctx ? ch->ch_ctx.gr_ctx->compute_preempt_mode : U32_MAX);
                 gk20a_channel_put(ch);
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c
index 65d560c7..94501a89 100644
--- a/drivers/gpu/nvgpu/common/linux/ioctl_channel.c
+++ b/drivers/gpu/nvgpu/common/linux/ioctl_channel.c
@@ -76,11 +76,15 @@ static void gk20a_channel_trace_sched_param(
                 const char *compute_preempt_mode),
         struct channel_gk20a *ch)
 {
+        struct tsg_gk20a *tsg = tsg_gk20a_from_ch(ch);
+
+        if (!tsg)
+                return;
+
         (trace)(ch->chid, ch->tsgid, ch->pid,
-                gk20a_is_channel_marked_as_tsg(ch) ?
-                        tsg_gk20a_from_ch(ch)->timeslice_us : ch->timeslice_us,
+                tsg_gk20a_from_ch(ch)->timeslice_us,
                 ch->timeout_ms_max,
-                gk20a_fifo_interleave_level_name(ch->interleave_level),
+                gk20a_fifo_interleave_level_name(tsg->interleave_level),
                 gr_gk20a_graphics_preempt_mode_name(ch->ch_ctx.gr_ctx ?
                         ch->ch_ctx.gr_ctx->graphics_preempt_mode : 0),
                 gr_gk20a_compute_preempt_mode_name(ch->ch_ctx.gr_ctx ?
@@ -795,28 +799,6 @@ u32 nvgpu_get_common_runlist_level(u32 level)
         return level;
 }
 
-static int gk20a_ioctl_channel_set_runlist_interleave(struct channel_gk20a *ch,
-                                                      u32 level)
-{
-        int err = 0;
-
-        err = gk20a_busy(ch->g);
-        if (err) {
-                nvgpu_err(ch->g, "failed to power on, %d", err);
-                goto fail;
-        }
-
-        level = nvgpu_get_common_runlist_level(level);
-        err = gk20a_channel_set_runlist_interleave(ch, level);
-
-        gk20a_idle(ch->g);
-        gk20a_channel_trace_sched_param(
-                trace_gk20a_channel_set_runlist_interleave, ch);
-
-fail:
-        return err;
-}
-
 static u32 nvgpu_obj_ctx_user_flags_to_common_flags(u32 user_flags)
 {
         u32 flags = 0;
@@ -1229,29 +1211,6 @@ long gk20a_channel_ioctl(struct file *filp,
                 err = gk20a_channel_set_wdt_status(ch,
                                 (struct nvgpu_channel_wdt_args *)buf);
                 break;
-        case NVGPU_IOCTL_CHANNEL_SET_RUNLIST_INTERLEAVE:
-                err = gk20a_ioctl_channel_set_runlist_interleave(ch,
-                        ((struct nvgpu_runlist_interleave_args *)buf)->level);
-                break;
-        case NVGPU_IOCTL_CHANNEL_SET_TIMESLICE:
-                err = gk20a_busy(ch->g);
-                if (err) {
-                        dev_err(dev,
-                                "%s: failed to host gk20a for ioctl cmd: 0x%x",
-                                __func__, cmd);
-                        break;
-                }
-                err = ch->g->ops.fifo.channel_set_timeslice(ch,
-                        ((struct nvgpu_timeslice_args *)buf)->timeslice_us);
-
-                gk20a_idle(ch->g);
-                gk20a_channel_trace_sched_param(
-                        trace_gk20a_channel_set_timeslice, ch);
-                break;
-        case NVGPU_IOCTL_CHANNEL_GET_TIMESLICE:
-                ((struct nvgpu_timeslice_args *)buf)->timeslice_us =
-                        gk20a_channel_get_timeslice(ch);
-                break;
         case NVGPU_IOCTL_CHANNEL_SET_PREEMPTION_MODE:
                 err = nvgpu_ioctl_channel_set_preemption_mode(ch,
                      ((struct nvgpu_preemption_mode_args *)buf)->graphics_preempt_mode,
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c
index e06b41da..6b8c630b 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c
@@ -604,8 +604,8 @@ int vgpu_fifo_wait_engine_idle(struct gk20a *g)
         return 0;
 }
 
-static int vgpu_fifo_tsg_set_runlist_interleave(struct gk20a *g,
-                                        u32 tsgid,
+int vgpu_fifo_set_runlist_interleave(struct gk20a *g,
+                                        u32 id,
                                         u32 runlist_id,
                                         u32 new_level)
 {
@@ -618,62 +618,13 @@ static int vgpu_fifo_tsg_set_runlist_interleave(struct gk20a *g,
 
         msg.cmd = TEGRA_VGPU_CMD_TSG_SET_RUNLIST_INTERLEAVE;
         msg.handle = vgpu_get_handle(g);
-        p->tsg_id = tsgid;
-        p->level = new_level;
-        err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
-        WARN_ON(err || msg.ret);
-        return err ? err : msg.ret;
-}
-
-int vgpu_fifo_set_runlist_interleave(struct gk20a *g,
-                                        u32 id,
-                                        bool is_tsg,
-                                        u32 runlist_id,
-                                        u32 new_level)
-{
-        struct tegra_vgpu_cmd_msg msg;
-        struct tegra_vgpu_channel_runlist_interleave_params *p =
-                        &msg.params.channel_interleave;
-        struct channel_gk20a *ch;
-        int err;
-
-        gk20a_dbg_fn("");
-
-        if (is_tsg)
-                return vgpu_fifo_tsg_set_runlist_interleave(g, id,
-                                                runlist_id, new_level);
-
-        ch = &g->fifo.channel[id];
-        msg.cmd = TEGRA_VGPU_CMD_CHANNEL_SET_RUNLIST_INTERLEAVE;
-        msg.handle = vgpu_get_handle(ch->g);
-        p->handle = ch->virt_ctx;
+        p->tsg_id = id;
         p->level = new_level;
         err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
         WARN_ON(err || msg.ret);
         return err ? err : msg.ret;
 }
 
-int vgpu_channel_set_timeslice(struct channel_gk20a *ch, u32 timeslice)
-{
-        struct tegra_vgpu_cmd_msg msg;
-        struct tegra_vgpu_channel_timeslice_params *p =
-                        &msg.params.channel_timeslice;
-        int err;
-
-        gk20a_dbg_fn("");
-
-        msg.cmd = TEGRA_VGPU_CMD_CHANNEL_SET_TIMESLICE;
-        msg.handle = vgpu_get_handle(ch->g);
-        p->handle = ch->virt_ctx;
-        p->timeslice_us = timeslice;
-        err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
-        err = err ? err : msg.ret;
-        WARN_ON(err);
-        if (!err)
-                ch->timeslice_us = p->timeslice_us;
-        return err;
-}
-
 int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch,
                                         u32 err_code, bool verbose)
 {
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h
index 5aefb356..92789ddd 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h
@@ -42,7 +42,6 @@ int vgpu_fifo_update_runlist(struct gk20a *g, u32 runlist_id,
 int vgpu_fifo_wait_engine_idle(struct gk20a *g);
 int vgpu_fifo_set_runlist_interleave(struct gk20a *g,
                                         u32 id,
-                                        bool is_tsg,
                                         u32 runlist_id,
                                         u32 new_level);
 int vgpu_channel_set_timeslice(struct channel_gk20a *ch, u32 timeslice);
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c
index 6f50dbb8..74fa65f3 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c
@@ -260,7 +260,6 @@ static const struct gpu_ops vgpu_gm20b_ops = {
                 .alloc_inst = vgpu_channel_alloc_inst,
                 .free_inst = vgpu_channel_free_inst,
                 .setup_ramfc = vgpu_channel_setup_ramfc,
-                .channel_set_timeslice = vgpu_channel_set_timeslice,
                 .default_timeslice_us = vgpu_fifo_default_timeslice_us,
                 .setup_userd = gk20a_fifo_setup_userd,
                 .userd_gp_get = gk20a_fifo_userd_gp_get,
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c
index 31608200..66ef6e00 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c
@@ -290,7 +290,6 @@ static const struct gpu_ops vgpu_gp10b_ops = {
                 .alloc_inst = vgpu_channel_alloc_inst,
                 .free_inst = vgpu_channel_free_inst,
                 .setup_ramfc = vgpu_channel_setup_ramfc,
-                .channel_set_timeslice = vgpu_channel_set_timeslice,
                 .default_timeslice_us = vgpu_fifo_default_timeslice_us,
                 .setup_userd = gk20a_fifo_setup_userd,
                 .userd_gp_get = gk20a_fifo_userd_gp_get,
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c
index b41d9dc3..1523c2de 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c
@@ -331,7 +331,6 @@ static const struct gpu_ops vgpu_gv11b_ops = {
                 .alloc_inst = vgpu_channel_alloc_inst,
                 .free_inst = vgpu_channel_free_inst,
                 .setup_ramfc = vgpu_channel_setup_ramfc,
-                .channel_set_timeslice = vgpu_channel_set_timeslice,
                 .default_timeslice_us = vgpu_fifo_default_timeslice_us,
                 .setup_userd = gk20a_fifo_setup_userd,
                 .userd_gp_get = gv11b_userd_gp_get,