summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/common/linux/vgpu
diff options
context:
space:
mode:
authorTerje Bergstrom <tbergstrom@nvidia.com>2017-12-27 16:04:17 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-01-02 16:53:09 -0500
commit86691b59c6fae2b091855c0f4d44079cad8529b1 (patch)
treec9fd2914ed052771980298f5e77bd43d7c430ec9 /drivers/gpu/nvgpu/common/linux/vgpu
parent14fa8207e2f7feb36f8fa284b94859e05136eb0f (diff)
gpu: nvgpu: Remove bare channel scheduling
Remove scheduling IOCTL implementations for bare channels. Also removes code that constructs bare channels in runlist. Bug 1842197 Change-Id: I6e833b38e24a2f2c45c7993edf939d365eaf41f0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1627326 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/vgpu')
-rw-r--r--drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c55
-rw-r--r--drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h1
-rw-r--r--drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c1
-rw-r--r--drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c1
-rw-r--r--drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c1
5 files changed, 3 insertions, 56 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c
index e06b41da..6b8c630b 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c
@@ -604,8 +604,8 @@ int vgpu_fifo_wait_engine_idle(struct gk20a *g)
604 return 0; 604 return 0;
605} 605}
606 606
607static int vgpu_fifo_tsg_set_runlist_interleave(struct gk20a *g, 607int vgpu_fifo_set_runlist_interleave(struct gk20a *g,
608 u32 tsgid, 608 u32 id,
609 u32 runlist_id, 609 u32 runlist_id,
610 u32 new_level) 610 u32 new_level)
611{ 611{
@@ -618,62 +618,13 @@ static int vgpu_fifo_tsg_set_runlist_interleave(struct gk20a *g,
618 618
619 msg.cmd = TEGRA_VGPU_CMD_TSG_SET_RUNLIST_INTERLEAVE; 619 msg.cmd = TEGRA_VGPU_CMD_TSG_SET_RUNLIST_INTERLEAVE;
620 msg.handle = vgpu_get_handle(g); 620 msg.handle = vgpu_get_handle(g);
621 p->tsg_id = tsgid; 621 p->tsg_id = id;
622 p->level = new_level;
623 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
624 WARN_ON(err || msg.ret);
625 return err ? err : msg.ret;
626}
627
628int vgpu_fifo_set_runlist_interleave(struct gk20a *g,
629 u32 id,
630 bool is_tsg,
631 u32 runlist_id,
632 u32 new_level)
633{
634 struct tegra_vgpu_cmd_msg msg;
635 struct tegra_vgpu_channel_runlist_interleave_params *p =
636 &msg.params.channel_interleave;
637 struct channel_gk20a *ch;
638 int err;
639
640 gk20a_dbg_fn("");
641
642 if (is_tsg)
643 return vgpu_fifo_tsg_set_runlist_interleave(g, id,
644 runlist_id, new_level);
645
646 ch = &g->fifo.channel[id];
647 msg.cmd = TEGRA_VGPU_CMD_CHANNEL_SET_RUNLIST_INTERLEAVE;
648 msg.handle = vgpu_get_handle(ch->g);
649 p->handle = ch->virt_ctx;
650 p->level = new_level; 622 p->level = new_level;
651 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); 623 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
652 WARN_ON(err || msg.ret); 624 WARN_ON(err || msg.ret);
653 return err ? err : msg.ret; 625 return err ? err : msg.ret;
654} 626}
655 627
656int vgpu_channel_set_timeslice(struct channel_gk20a *ch, u32 timeslice)
657{
658 struct tegra_vgpu_cmd_msg msg;
659 struct tegra_vgpu_channel_timeslice_params *p =
660 &msg.params.channel_timeslice;
661 int err;
662
663 gk20a_dbg_fn("");
664
665 msg.cmd = TEGRA_VGPU_CMD_CHANNEL_SET_TIMESLICE;
666 msg.handle = vgpu_get_handle(ch->g);
667 p->handle = ch->virt_ctx;
668 p->timeslice_us = timeslice;
669 err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
670 err = err ? err : msg.ret;
671 WARN_ON(err);
672 if (!err)
673 ch->timeslice_us = p->timeslice_us;
674 return err;
675}
676
677int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch, 628int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch,
678 u32 err_code, bool verbose) 629 u32 err_code, bool verbose)
679{ 630{
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h
index 5aefb356..92789ddd 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h
@@ -42,7 +42,6 @@ int vgpu_fifo_update_runlist(struct gk20a *g, u32 runlist_id,
42int vgpu_fifo_wait_engine_idle(struct gk20a *g); 42int vgpu_fifo_wait_engine_idle(struct gk20a *g);
43int vgpu_fifo_set_runlist_interleave(struct gk20a *g, 43int vgpu_fifo_set_runlist_interleave(struct gk20a *g,
44 u32 id, 44 u32 id,
45 bool is_tsg,
46 u32 runlist_id, 45 u32 runlist_id,
47 u32 new_level); 46 u32 new_level);
48int vgpu_channel_set_timeslice(struct channel_gk20a *ch, u32 timeslice); 47int vgpu_channel_set_timeslice(struct channel_gk20a *ch, u32 timeslice);
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c
index 6f50dbb8..74fa65f3 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c
@@ -260,7 +260,6 @@ static const struct gpu_ops vgpu_gm20b_ops = {
260 .alloc_inst = vgpu_channel_alloc_inst, 260 .alloc_inst = vgpu_channel_alloc_inst,
261 .free_inst = vgpu_channel_free_inst, 261 .free_inst = vgpu_channel_free_inst,
262 .setup_ramfc = vgpu_channel_setup_ramfc, 262 .setup_ramfc = vgpu_channel_setup_ramfc,
263 .channel_set_timeslice = vgpu_channel_set_timeslice,
264 .default_timeslice_us = vgpu_fifo_default_timeslice_us, 263 .default_timeslice_us = vgpu_fifo_default_timeslice_us,
265 .setup_userd = gk20a_fifo_setup_userd, 264 .setup_userd = gk20a_fifo_setup_userd,
266 .userd_gp_get = gk20a_fifo_userd_gp_get, 265 .userd_gp_get = gk20a_fifo_userd_gp_get,
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c
index 31608200..66ef6e00 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c
@@ -290,7 +290,6 @@ static const struct gpu_ops vgpu_gp10b_ops = {
290 .alloc_inst = vgpu_channel_alloc_inst, 290 .alloc_inst = vgpu_channel_alloc_inst,
291 .free_inst = vgpu_channel_free_inst, 291 .free_inst = vgpu_channel_free_inst,
292 .setup_ramfc = vgpu_channel_setup_ramfc, 292 .setup_ramfc = vgpu_channel_setup_ramfc,
293 .channel_set_timeslice = vgpu_channel_set_timeslice,
294 .default_timeslice_us = vgpu_fifo_default_timeslice_us, 293 .default_timeslice_us = vgpu_fifo_default_timeslice_us,
295 .setup_userd = gk20a_fifo_setup_userd, 294 .setup_userd = gk20a_fifo_setup_userd,
296 .userd_gp_get = gk20a_fifo_userd_gp_get, 295 .userd_gp_get = gk20a_fifo_userd_gp_get,
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c
index b41d9dc3..1523c2de 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c
@@ -331,7 +331,6 @@ static const struct gpu_ops vgpu_gv11b_ops = {
331 .alloc_inst = vgpu_channel_alloc_inst, 331 .alloc_inst = vgpu_channel_alloc_inst,
332 .free_inst = vgpu_channel_free_inst, 332 .free_inst = vgpu_channel_free_inst,
333 .setup_ramfc = vgpu_channel_setup_ramfc, 333 .setup_ramfc = vgpu_channel_setup_ramfc,
334 .channel_set_timeslice = vgpu_channel_set_timeslice,
335 .default_timeslice_us = vgpu_fifo_default_timeslice_us, 334 .default_timeslice_us = vgpu_fifo_default_timeslice_us,
336 .setup_userd = gk20a_fifo_setup_userd, 335 .setup_userd = gk20a_fifo_setup_userd,
337 .userd_gp_get = gv11b_userd_gp_get, 336 .userd_gp_get = gv11b_userd_gp_get,