gpu: nvgpu: Make graphics context property of TSG

Move graphics context ownership to TSG instead of channel. Combine
channel_ctx_gk20a and gr_ctx_desc to one structure, because the split
between them was arbitrary. Move context header to be property of
channel.

Bug 1842197

Change-Id: I410e3262f80b318d8528bcbec270b63a2d8d2ff9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1639532
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 files changed, 13 insertions, 17 deletions

diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.c
index ed61f16b..9adf20d1 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.c
@@ -27,12 +27,11 @@
 #include <nvgpu/hw/gp10b/hw_gr_gp10b.h>
 
 int vgpu_gr_gp10b_alloc_gr_ctx(struct gk20a *g,
-                                struct gr_ctx_desc **__gr_ctx,
+                                struct nvgpu_gr_ctx *gr_ctx,
                                 struct vm_gk20a *vm,
                                 u32 class,
                                 u32 flags)
 {
-        struct gr_ctx_desc *gr_ctx;
         u32 graphics_preempt_mode = 0;
         u32 compute_preempt_mode = 0;
         struct vgpu_priv_data *priv = vgpu_get_priv_data(g);
@@ -40,12 +39,10 @@ int vgpu_gr_gp10b_alloc_gr_ctx(struct gk20a *g,
 
         gk20a_dbg_fn("");
 
-        err = vgpu_gr_alloc_gr_ctx(g, __gr_ctx, vm, class, flags);
+        err = vgpu_gr_alloc_gr_ctx(g, gr_ctx, vm, class, flags);
         if (err)
                 return err;
 
-        gr_ctx = *__gr_ctx;
-
         if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_GFXP)
                 graphics_preempt_mode = NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP;
         if (flags & NVGPU_OBJ_CTX_FLAGS_SUPPORT_CILP)
@@ -84,7 +81,7 @@ fail:
 }
 
 int vgpu_gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g,
-                                struct gr_ctx_desc *gr_ctx,
+                                struct nvgpu_gr_ctx *gr_ctx,
                                 struct vm_gk20a *vm, u32 class,
                                 u32 graphics_preempt_mode,
                                 u32 compute_preempt_mode)
@@ -240,7 +237,7 @@ int vgpu_gr_gp10b_set_preemption_mode(struct channel_gk20a *ch,
                                         u32 graphics_preempt_mode,
                                         u32 compute_preempt_mode)
 {
-        struct gr_ctx_desc *gr_ctx = ch->ch_ctx.gr_ctx;
+        struct nvgpu_gr_ctx *gr_ctx;
         struct gk20a *g = ch->g;
         struct tsg_gk20a *tsg;
         struct vm_gk20a *vm;
@@ -251,6 +248,13 @@ int vgpu_gr_gp10b_set_preemption_mode(struct channel_gk20a *ch,
         if (!class)
                 return -EINVAL;
 
+        tsg = tsg_gk20a_from_ch(ch);
+        if (!tsg)
+                return -EINVAL;
+
+        vm = tsg->vm;
+        gr_ctx = &tsg->gr_ctx;
+
         /* skip setting anything if both modes are already set */
         if (graphics_preempt_mode &&
            (graphics_preempt_mode == gr_ctx->graphics_preempt_mode))
@@ -263,13 +267,6 @@ int vgpu_gr_gp10b_set_preemption_mode(struct channel_gk20a *ch,
         if (graphics_preempt_mode == 0 && compute_preempt_mode == 0)
                 return 0;
 
-        if (gk20a_is_channel_marked_as_tsg(ch)) {
-                tsg = &g->fifo.tsg[ch->tsgid];
-                vm = tsg->vm;
-        } else {
-                vm = ch->vm;
-        }
-
         if (g->ops.gr.set_ctxsw_preemption_mode) {
                 err = g->ops.gr.set_ctxsw_preemption_mode(g, gr_ctx, vm, class,
                                                 graphics_preempt_mode,
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.h b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.h
index 31b88d19..559bd227 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.h
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_gr_gp10b.h
@@ -20,12 +20,12 @@
 #include "gk20a/gk20a.h"
 
 int vgpu_gr_gp10b_alloc_gr_ctx(struct gk20a *g,
-                                struct gr_ctx_desc **__gr_ctx,
+                                struct nvgpu_gr_ctx *gr_ctx,
                                 struct vm_gk20a *vm,
                                 u32 class,
                                 u32 flags);
 int vgpu_gr_gp10b_set_ctxsw_preemption_mode(struct gk20a *g,
-                                struct gr_ctx_desc *gr_ctx,
+                                struct nvgpu_gr_ctx *gr_ctx,
                                 struct vm_gk20a *vm, u32 class,
                                 u32 graphics_preempt_mode,
                                 u32 compute_preempt_mode);
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c
index e8cb96b4..d5fd5102 100644
--- a/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c
+++ b/drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_hal_gp10b.c
@@ -112,7 +112,6 @@ static const struct gpu_ops vgpu_gp10b_ops = {
                 .load_ctxsw_ucode = gr_gk20a_load_ctxsw_ucode,
                 .set_gpc_tpc_mask = gr_gp10b_set_gpc_tpc_mask,
                 .get_gpc_tpc_mask = vgpu_gr_get_gpc_tpc_mask,
-                .free_channel_ctx = vgpu_gr_free_channel_ctx,
                 .alloc_obj_ctx = vgpu_gr_alloc_obj_ctx,
                 .bind_ctxsw_zcull = vgpu_gr_bind_ctxsw_zcull,
                 .get_zcull_info = vgpu_gr_get_zcull_info,