diff options
author | Thomas Fleury <tfleury@nvidia.com> | 2017-12-30 16:04:19 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-01-10 18:57:20 -0500 |
commit | 6b90684ceec6c32aed7491a059b3972b1f1be5f4 (patch) | |
tree | 0bc0fa73de0e352d8da8f360cac780c903c60d95 /drivers/gpu/nvgpu/common/linux/vgpu/gm20b | |
parent | 5fb7c7d8f97bbec0d01f4f26aaf7757790c8b407 (diff) |
gpu: nvgpu: vgpu: get virtual SMs mapping
On gv11b we can have multiple SMs per TPC. Add sm_per_tpc in
vgpu constants to properly dimension the virtual SM to TPC/GPC
mapping in virtualization case.
Use TEGRA_VGPU_CMD_GET_SMS_MAPPING to query current mapping.
Bug 2039676
Change-Id: I817be18f9a28cfb9bd8af207d7d6341a2ec3994b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1631203
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/vgpu/gm20b')
3 files changed, 5 insertions, 27 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_gr_gm20b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_gr_gm20b.c index 260ce080..fc39b3f5 100644 --- a/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_gr_gm20b.c +++ b/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_gr_gm20b.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -40,24 +40,3 @@ void vgpu_gr_gm20b_init_cyclestats(struct gk20a *g) | |||
40 | #endif | 40 | #endif |
41 | } | 41 | } |
42 | 42 | ||
43 | int vgpu_gm20b_init_fs_state(struct gk20a *g) | ||
44 | { | ||
45 | struct gr_gk20a *gr = &g->gr; | ||
46 | u32 tpc_index, gpc_index; | ||
47 | u32 sm_id = 0; | ||
48 | |||
49 | gk20a_dbg_fn(""); | ||
50 | |||
51 | for (gpc_index = 0; gpc_index < gr->gpc_count; gpc_index++) { | ||
52 | for (tpc_index = 0; tpc_index < gr->gpc_tpc_count[gpc_index]; | ||
53 | tpc_index++) { | ||
54 | g->gr.sm_to_cluster[sm_id].tpc_index = tpc_index; | ||
55 | g->gr.sm_to_cluster[sm_id].gpc_index = gpc_index; | ||
56 | |||
57 | sm_id++; | ||
58 | } | ||
59 | } | ||
60 | |||
61 | gr->no_of_sm = sm_id; | ||
62 | return 0; | ||
63 | } | ||
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_gr_gm20b.h b/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_gr_gm20b.h index f17de450..77b83cbe 100644 --- a/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_gr_gm20b.h +++ b/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_gr_gm20b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -20,6 +20,5 @@ | |||
20 | #include "gk20a/gk20a.h" | 20 | #include "gk20a/gk20a.h" |
21 | 21 | ||
22 | void vgpu_gr_gm20b_init_cyclestats(struct gk20a *g); | 22 | void vgpu_gr_gm20b_init_cyclestats(struct gk20a *g); |
23 | int vgpu_gm20b_init_fs_state(struct gk20a *g); | ||
24 | 23 | ||
25 | #endif | 24 | #endif |
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c b/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c index 74fa65f3..eeeccf62 100644 --- a/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c +++ b/drivers/gpu/nvgpu/common/linux/vgpu/gm20b/vgpu_hal_gm20b.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -92,7 +92,7 @@ static const struct gpu_ops vgpu_gm20b_ops = { | |||
92 | .is_valid_compute_class = gr_gm20b_is_valid_compute_class, | 92 | .is_valid_compute_class = gr_gm20b_is_valid_compute_class, |
93 | .get_sm_dsm_perf_regs = gr_gm20b_get_sm_dsm_perf_regs, | 93 | .get_sm_dsm_perf_regs = gr_gm20b_get_sm_dsm_perf_regs, |
94 | .get_sm_dsm_perf_ctrl_regs = gr_gm20b_get_sm_dsm_perf_ctrl_regs, | 94 | .get_sm_dsm_perf_ctrl_regs = gr_gm20b_get_sm_dsm_perf_ctrl_regs, |
95 | .init_fs_state = vgpu_gm20b_init_fs_state, | 95 | .init_fs_state = vgpu_gr_init_fs_state, |
96 | .set_hww_esr_report_mask = gr_gm20b_set_hww_esr_report_mask, | 96 | .set_hww_esr_report_mask = gr_gm20b_set_hww_esr_report_mask, |
97 | .falcon_load_ucode = gr_gm20b_load_ctxsw_ucode_segments, | 97 | .falcon_load_ucode = gr_gm20b_load_ctxsw_ucode_segments, |
98 | .load_ctxsw_ucode = gr_gk20a_load_ctxsw_ucode, | 98 | .load_ctxsw_ucode = gr_gk20a_load_ctxsw_ucode, |
@@ -145,7 +145,7 @@ static const struct gpu_ops vgpu_gm20b_ops = { | |||
145 | .suspend_contexts = vgpu_gr_suspend_contexts, | 145 | .suspend_contexts = vgpu_gr_suspend_contexts, |
146 | .resume_contexts = vgpu_gr_resume_contexts, | 146 | .resume_contexts = vgpu_gr_resume_contexts, |
147 | .get_preemption_mode_flags = gr_gm20b_get_preemption_mode_flags, | 147 | .get_preemption_mode_flags = gr_gm20b_get_preemption_mode_flags, |
148 | .init_sm_id_table = gr_gk20a_init_sm_id_table, | 148 | .init_sm_id_table = vgpu_gr_init_sm_id_table, |
149 | .load_smid_config = gr_gm20b_load_smid_config, | 149 | .load_smid_config = gr_gm20b_load_smid_config, |
150 | .program_sm_id_numbering = gr_gm20b_program_sm_id_numbering, | 150 | .program_sm_id_numbering = gr_gm20b_program_sm_id_numbering, |
151 | .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr, | 151 | .is_ltcs_ltss_addr = gr_gm20b_is_ltcs_ltss_addr, |