diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2017-11-14 09:43:28 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-11-17 11:27:19 -0500 |
commit | b42fb7ba26b565f93118fbdd9e17b42ee6144c5e (patch) | |
tree | 26e2d919f019d15b51bba4d7b5c938f77ad5cff5 /drivers/gpu/nvgpu/common/linux/vgpu/clk_vgpu.c | |
parent | b7cc3a2aa6c92a09eed43513287c9062f22ad127 (diff) |
gpu: nvgpu: move vgpu code to linux
Most of VGPU code is linux specific but lies in common code
So until VGPU code is properly abstracted and made os-independent,
move all of VGPU code to linux specific directory
Handle corresponding Makefile changes
Update all #includes to reflect new paths
Add GPL license to newly added linux files
Jira NVGPU-387
Change-Id: Ic133e4c80e570bcc273f0dacf45283fefd678923
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1599472
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/vgpu/clk_vgpu.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/vgpu/clk_vgpu.c | 164 |
1 files changed, 164 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/vgpu/clk_vgpu.c b/drivers/gpu/nvgpu/common/linux/vgpu/clk_vgpu.c new file mode 100644 index 00000000..bcdf8ee9 --- /dev/null +++ b/drivers/gpu/nvgpu/common/linux/vgpu/clk_vgpu.c | |||
@@ -0,0 +1,164 @@ | |||
1 | /* | ||
2 | * Virtualized GPU Clock Interface | ||
3 | * | ||
4 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
17 | */ | ||
18 | |||
19 | #include "vgpu.h" | ||
20 | #include "clk_vgpu.h" | ||
21 | |||
22 | static unsigned long | ||
23 | vgpu_freq_table[TEGRA_VGPU_GPU_FREQ_TABLE_SIZE]; | ||
24 | |||
25 | static unsigned long vgpu_clk_get_rate(struct gk20a *g, u32 api_domain) | ||
26 | { | ||
27 | struct tegra_vgpu_cmd_msg msg = {}; | ||
28 | struct tegra_vgpu_gpu_clk_rate_params *p = &msg.params.gpu_clk_rate; | ||
29 | int err; | ||
30 | unsigned long ret = 0; | ||
31 | |||
32 | gk20a_dbg_fn(""); | ||
33 | |||
34 | switch (api_domain) { | ||
35 | case CTRL_CLK_DOMAIN_GPCCLK: | ||
36 | msg.cmd = TEGRA_VGPU_CMD_GET_GPU_CLK_RATE; | ||
37 | msg.handle = vgpu_get_handle(g); | ||
38 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
39 | err = err ? err : msg.ret; | ||
40 | if (err) | ||
41 | nvgpu_err(g, "%s failed - %d", __func__, err); | ||
42 | else | ||
43 | /* return frequency in Hz */ | ||
44 | ret = p->rate * 1000; | ||
45 | break; | ||
46 | case CTRL_CLK_DOMAIN_PWRCLK: | ||
47 | nvgpu_err(g, "unsupported clock: %u", api_domain); | ||
48 | break; | ||
49 | default: | ||
50 | nvgpu_err(g, "unknown clock: %u", api_domain); | ||
51 | break; | ||
52 | } | ||
53 | |||
54 | return ret; | ||
55 | } | ||
56 | |||
57 | static int vgpu_clk_set_rate(struct gk20a *g, | ||
58 | u32 api_domain, unsigned long rate) | ||
59 | { | ||
60 | struct tegra_vgpu_cmd_msg msg = {}; | ||
61 | struct tegra_vgpu_gpu_clk_rate_params *p = &msg.params.gpu_clk_rate; | ||
62 | int err = -EINVAL; | ||
63 | |||
64 | gk20a_dbg_fn(""); | ||
65 | |||
66 | switch (api_domain) { | ||
67 | case CTRL_CLK_DOMAIN_GPCCLK: | ||
68 | msg.cmd = TEGRA_VGPU_CMD_SET_GPU_CLK_RATE; | ||
69 | msg.handle = vgpu_get_handle(g); | ||
70 | |||
71 | /* server dvfs framework requires frequency in kHz */ | ||
72 | p->rate = (u32)(rate / 1000); | ||
73 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
74 | err = err ? err : msg.ret; | ||
75 | if (err) | ||
76 | nvgpu_err(g, "%s failed - %d", __func__, err); | ||
77 | break; | ||
78 | case CTRL_CLK_DOMAIN_PWRCLK: | ||
79 | nvgpu_err(g, "unsupported clock: %u", api_domain); | ||
80 | break; | ||
81 | default: | ||
82 | nvgpu_err(g, "unknown clock: %u", api_domain); | ||
83 | break; | ||
84 | } | ||
85 | |||
86 | return err; | ||
87 | } | ||
88 | |||
89 | static unsigned long vgpu_clk_get_maxrate(struct gk20a *g, u32 api_domain) | ||
90 | { | ||
91 | struct vgpu_priv_data *priv = vgpu_get_priv_data(g); | ||
92 | |||
93 | return priv->constants.max_freq; | ||
94 | } | ||
95 | |||
96 | void vgpu_init_clk_support(struct gk20a *g) | ||
97 | { | ||
98 | g->ops.clk.get_rate = vgpu_clk_get_rate; | ||
99 | g->ops.clk.set_rate = vgpu_clk_set_rate; | ||
100 | g->ops.clk.get_maxrate = vgpu_clk_get_maxrate; | ||
101 | } | ||
102 | |||
103 | long vgpu_clk_round_rate(struct device *dev, unsigned long rate) | ||
104 | { | ||
105 | /* server will handle frequency rounding */ | ||
106 | return rate; | ||
107 | } | ||
108 | |||
109 | int vgpu_clk_get_freqs(struct device *dev, | ||
110 | unsigned long **freqs, int *num_freqs) | ||
111 | { | ||
112 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
113 | struct gk20a *g = platform->g; | ||
114 | struct tegra_vgpu_cmd_msg msg = {}; | ||
115 | struct tegra_vgpu_get_gpu_freq_table_params *p = | ||
116 | &msg.params.get_gpu_freq_table; | ||
117 | unsigned int i; | ||
118 | int err; | ||
119 | |||
120 | gk20a_dbg_fn(""); | ||
121 | |||
122 | msg.cmd = TEGRA_VGPU_CMD_GET_GPU_FREQ_TABLE; | ||
123 | msg.handle = vgpu_get_handle(g); | ||
124 | |||
125 | p->num_freqs = TEGRA_VGPU_GPU_FREQ_TABLE_SIZE; | ||
126 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
127 | err = err ? err : msg.ret; | ||
128 | if (err) { | ||
129 | nvgpu_err(g, "%s failed - %d", __func__, err); | ||
130 | return err; | ||
131 | } | ||
132 | |||
133 | /* return frequency in Hz */ | ||
134 | for (i = 0; i < p->num_freqs; i++) | ||
135 | vgpu_freq_table[i] = p->freqs[i] * 1000; | ||
136 | |||
137 | *freqs = vgpu_freq_table; | ||
138 | *num_freqs = p->num_freqs; | ||
139 | |||
140 | return 0; | ||
141 | } | ||
142 | |||
143 | int vgpu_clk_cap_rate(struct device *dev, unsigned long rate) | ||
144 | { | ||
145 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
146 | struct gk20a *g = platform->g; | ||
147 | struct tegra_vgpu_cmd_msg msg = {}; | ||
148 | struct tegra_vgpu_gpu_clk_rate_params *p = &msg.params.gpu_clk_rate; | ||
149 | int err = 0; | ||
150 | |||
151 | gk20a_dbg_fn(""); | ||
152 | |||
153 | msg.cmd = TEGRA_VGPU_CMD_CAP_GPU_CLK_RATE; | ||
154 | msg.handle = vgpu_get_handle(g); | ||
155 | p->rate = (u32)rate; | ||
156 | err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg)); | ||
157 | err = err ? err : msg.ret; | ||
158 | if (err) { | ||
159 | nvgpu_err(g, "%s failed - %d", __func__, err); | ||
160 | return err; | ||
161 | } | ||
162 | |||
163 | return 0; | ||
164 | } | ||