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authorTerje Bergstrom <tbergstrom@nvidia.com>2018-01-17 15:39:13 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-01-23 01:20:15 -0500
commitf3f14cdff53f4b936e2505d44aad6e3bca143056 (patch)
tree8d6438132b8ca429758d18142c5f569f60f2bc35 /drivers/gpu/nvgpu/common/linux/ioctl_tsg_t19x.c
parent193a2ed38ca51d898ac811820ab86237c84e18eb (diff)
gpu: nvgpu: Fold T19x code back to main code paths
Lots of code paths were split to T19x specific code paths and structs due to split repository. Now that repositories are merged, fold all of them back to main code paths and structs and remove the T19x specific Kconfig flag. Change-Id: Id0d17a5f0610fc0b49f51ab6664e716dc8b222b6 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1640606 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/ioctl_tsg_t19x.c')
-rw-r--r--drivers/gpu/nvgpu/common/linux/ioctl_tsg_t19x.c115
1 files changed, 0 insertions, 115 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_tsg_t19x.c b/drivers/gpu/nvgpu/common/linux/ioctl_tsg_t19x.c
deleted file mode 100644
index 1c96db69..00000000
--- a/drivers/gpu/nvgpu/common/linux/ioctl_tsg_t19x.c
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * GV11B TSG IOCTL Handler
3 *
4 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#include <linux/types.h>
17#include <uapi/linux/nvgpu.h>
18
19#include "gk20a/gk20a.h"
20
21#include "gv11b/fifo_gv11b.h"
22#include "gv11b/subctx_gv11b.h"
23#include "ioctl_tsg_t19x.h"
24#include "common/linux/os_linux.h"
25
26static int gv11b_tsg_ioctl_bind_channel_ex(struct gk20a *g,
27 struct tsg_gk20a *tsg, struct nvgpu_tsg_bind_channel_ex_args *arg)
28{
29 struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
30 struct gk20a_sched_ctrl *sched = &l->sched_ctrl;
31 struct channel_gk20a *ch;
32 struct gr_gk20a *gr = &g->gr;
33 int err = 0;
34
35 nvgpu_log(g, gpu_dbg_fn | gpu_dbg_sched, "tsgid=%u", tsg->tsgid);
36
37 nvgpu_mutex_acquire(&sched->control_lock);
38 if (sched->control_locked) {
39 err = -EPERM;
40 goto mutex_release;
41 }
42 err = gk20a_busy(g);
43 if (err) {
44 nvgpu_err(g, "failed to power on gpu");
45 goto mutex_release;
46 }
47
48 ch = gk20a_get_channel_from_file(arg->channel_fd);
49 if (!ch) {
50 err = -EINVAL;
51 goto idle;
52 }
53
54 if (arg->tpc_pg_enabled && (!tsg->t19x.tpc_num_initialized)) {
55 if ((arg->num_active_tpcs > gr->max_tpc_count) ||
56 !(arg->num_active_tpcs)) {
57 nvgpu_err(g, "Invalid num of active TPCs");
58 err = -EINVAL;
59 goto ch_put;
60 }
61 tsg->t19x.tpc_num_initialized = true;
62 tsg->t19x.num_active_tpcs = arg->num_active_tpcs;
63 tsg->t19x.tpc_pg_enabled = true;
64 } else {
65 tsg->t19x.tpc_pg_enabled = false;
66 nvgpu_log(g, gpu_dbg_info, "dynamic TPC-PG not enabled");
67 }
68
69 if (arg->subcontext_id < g->fifo.t19x.max_subctx_count) {
70 ch->t19x.subctx_id = arg->subcontext_id;
71 } else {
72 err = -EINVAL;
73 goto ch_put;
74 }
75
76 nvgpu_log(g, gpu_dbg_info, "channel id : %d : subctx: %d",
77 ch->chid, ch->t19x.subctx_id);
78
79 /* Use runqueue selector 1 for all ASYNC ids */
80 if (ch->t19x.subctx_id > CHANNEL_INFO_VEID0)
81 ch->t19x.runqueue_sel = 1;
82
83 err = ch->g->ops.fifo.tsg_bind_channel(tsg, ch);
84ch_put:
85 gk20a_channel_put(ch);
86idle:
87 gk20a_idle(g);
88mutex_release:
89 nvgpu_mutex_release(&sched->control_lock);
90 return err;
91}
92
93int t19x_tsg_ioctl_handler(struct gk20a *g, struct tsg_gk20a *tsg,
94 unsigned int cmd, u8 *buf)
95{
96 int err = 0;
97
98 nvgpu_log(g, gpu_dbg_fn, "t19x_tsg_ioctl_handler");
99
100 switch (cmd) {
101 case NVGPU_TSG_IOCTL_BIND_CHANNEL_EX:
102 {
103 err = gv11b_tsg_ioctl_bind_channel_ex(g, tsg,
104 (struct nvgpu_tsg_bind_channel_ex_args *)buf);
105 break;
106 }
107
108 default:
109 nvgpu_err(g, "unrecognized tsg gpu ioctl cmd: 0x%x",
110 cmd);
111 err = -ENOTTY;
112 break;
113 }
114 return err;
115}