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authorTerje Bergstrom <tbergstrom@nvidia.com>2018-01-24 15:42:57 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-02-15 17:11:46 -0500
commit662c441467c4f251d65840f2097ac4e58ec234ff (patch)
tree6d28a87ee4805bd51ab41fbdb158ee596f9e9fe8 /drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
parentb6ab47d39683f607de166fef1111b20d8eda097e (diff)
gpu: nvgpu: Allow disabling CDE functionality
CDE is a Tegra SoC specific feature. Add new config option CONFIG_NVGPU_SUPPORT_CDE and #ifdef all CDE specific code with it. JIRA NVGPU-4 Change-Id: I6f0b0047d6ba2b5c36c2eb9b8a1514776741f5b5 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1648002 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c')
-rw-r--r--drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
index 0b449692..71a9bee6 100644
--- a/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
+++ b/drivers/gpu/nvgpu/common/linux/ioctl_ctrl.c
@@ -333,10 +333,12 @@ static int gk20a_ctrl_prepare_compressible_read(
333 struct gk20a *g, 333 struct gk20a *g,
334 struct nvgpu_gpu_prepare_compressible_read_args *args) 334 struct nvgpu_gpu_prepare_compressible_read_args *args)
335{ 335{
336 int ret = -ENOSYS;
337
338#ifdef CONFIG_NVGPU_SUPPORT_CDE
336 struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g); 339 struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(g);
337 struct nvgpu_fence fence; 340 struct nvgpu_fence fence;
338 struct gk20a_fence *fence_out = NULL; 341 struct gk20a_fence *fence_out = NULL;
339 int ret = 0;
340 int flags = args->submit_flags; 342 int flags = args->submit_flags;
341 343
342 fence.id = args->fence.syncpt_id; 344 fence.id = args->fence.syncpt_id;
@@ -377,18 +379,21 @@ static int gk20a_ctrl_prepare_compressible_read(
377 } 379 }
378 } 380 }
379 gk20a_fence_put(fence_out); 381 gk20a_fence_put(fence_out);
382#endif
380 383
381 return 0; 384 return ret;
382} 385}
383 386
384static int gk20a_ctrl_mark_compressible_write( 387static int gk20a_ctrl_mark_compressible_write(
385 struct gk20a *g, 388 struct gk20a *g,
386 struct nvgpu_gpu_mark_compressible_write_args *args) 389 struct nvgpu_gpu_mark_compressible_write_args *args)
387{ 390{
388 int ret; 391 int ret = -ENOSYS;
389 392
393#ifdef CONFIG_NVGPU_SUPPORT_CDE
390 ret = gk20a_mark_compressible_write(g, args->handle, 394 ret = gk20a_mark_compressible_write(g, args->handle,
391 args->valid_compbits, args->offset, args->zbc_color); 395 args->valid_compbits, args->offset, args->zbc_color);
396#endif
392 397
393 return ret; 398 return ret;
394} 399}