diff options
author | Deepak Nibade <dnibade@nvidia.com> | 2018-01-16 06:07:37 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-02-07 18:35:47 -0500 |
commit | f0cbe19b12524f5df6466eaf86acbfb349def6b1 (patch) | |
tree | bed8a312e29592d41d9de4afb331756c2d38fb96 /drivers/gpu/nvgpu/common/linux/ioctl_as.c | |
parent | 0c8deb74aff6d0781cdf3278f56d7bce42b16a67 (diff) |
gpu: nvgpu: add user API to get read-only syncpoint address map
Add User space API NVGPU_AS_IOCTL_GET_SYNC_RO_MAP to get read-only syncpoint
address map in user space
We already map whole syncpoint shim to each address space with base address
being vm->syncpt_ro_map_gpu_va
This new API exposes this base GPU_VA address of syncpoint map, and unit size
of each syncpoint to user space.
User space can then calculate address of each syncpoint as
syncpoint_address = base_gpu_va + (syncpoint_id * syncpoint_unit_size)
Note that this syncpoint address is read_only, and should be only used for
inserting semaphore acquires.
Adding semaphore release with this address would result in MMU_FAULT
Define new HAL g->ops.fifo.get_sync_ro_map and set this for all GPUs supported
on Xavier SoC
Bug 200327559
Change-Id: Ica0db48fc28fdd0ff2a5eb09574dac843dc5e4fd
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1649365
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/ioctl_as.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/ioctl_as.c | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/ioctl_as.c b/drivers/gpu/nvgpu/common/linux/ioctl_as.c index 8aea3d22..c5769476 100644 --- a/drivers/gpu/nvgpu/common/linux/ioctl_as.c +++ b/drivers/gpu/nvgpu/common/linux/ioctl_as.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A Address Spaces | 2 | * GK20A Address Spaces |
3 | * | 3 | * |
4 | * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms and conditions of the GNU General Public License, | 7 | * under the terms and conditions of the GNU General Public License, |
@@ -256,6 +256,33 @@ static int gk20a_as_ioctl_get_va_regions( | |||
256 | return 0; | 256 | return 0; |
257 | } | 257 | } |
258 | 258 | ||
259 | static int nvgpu_as_ioctl_get_sync_ro_map( | ||
260 | struct gk20a_as_share *as_share, | ||
261 | struct nvgpu_as_get_sync_ro_map_args *args) | ||
262 | { | ||
263 | #ifdef CONFIG_TEGRA_GK20A_NVHOST | ||
264 | struct vm_gk20a *vm = as_share->vm; | ||
265 | struct gk20a *g = gk20a_from_vm(vm); | ||
266 | u64 base_gpuva; | ||
267 | u32 sync_size; | ||
268 | int err = 0; | ||
269 | |||
270 | if (!g->ops.fifo.get_sync_ro_map) | ||
271 | return -EINVAL; | ||
272 | |||
273 | err = g->ops.fifo.get_sync_ro_map(vm, &base_gpuva, &sync_size); | ||
274 | if (err) | ||
275 | return err; | ||
276 | |||
277 | args->base_gpuva = base_gpuva; | ||
278 | args->sync_size = sync_size; | ||
279 | |||
280 | return err; | ||
281 | #else | ||
282 | return -EINVAL; | ||
283 | #endif | ||
284 | } | ||
285 | |||
259 | int gk20a_as_dev_open(struct inode *inode, struct file *filp) | 286 | int gk20a_as_dev_open(struct inode *inode, struct file *filp) |
260 | { | 287 | { |
261 | struct nvgpu_os_linux *l; | 288 | struct nvgpu_os_linux *l; |
@@ -367,6 +394,10 @@ long gk20a_as_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) | |||
367 | err = gk20a_as_ioctl_map_buffer_batch(as_share, | 394 | err = gk20a_as_ioctl_map_buffer_batch(as_share, |
368 | (struct nvgpu_as_map_buffer_batch_args *)buf); | 395 | (struct nvgpu_as_map_buffer_batch_args *)buf); |
369 | break; | 396 | break; |
397 | case NVGPU_AS_IOCTL_GET_SYNC_RO_MAP: | ||
398 | err = nvgpu_as_ioctl_get_sync_ro_map(as_share, | ||
399 | (struct nvgpu_as_get_sync_ro_map_args *)buf); | ||
400 | break; | ||
370 | default: | 401 | default: |
371 | err = -ENOTTY; | 402 | err = -ENOTTY; |
372 | break; | 403 | break; |