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authorDebarshi Dutta <ddutta@nvidia.com>2017-10-10 01:15:54 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-10-16 16:35:04 -0400
commit61b263d83222cd5d2ff3d2d5d699b07ebdf44288 (patch)
tree07ef35fb427dc2f93741ed9193673b6da2872bb7 /drivers/gpu/nvgpu/common/linux/driver_common.c
parent30b9cbe35a2a0adc4e3a65b033dc0f61046783ea (diff)
gpu: nvgpu: replace wait_queue_head_t with nvgpu_cond
Replace existing usages of wait_queue_head_t with struct nvgpu_cond and using the corresponding APIs in order to reduce Linux dependencies in NVGPU. JIRA NVGPU-205 Change-Id: I85850369c3c47d3e1704e4171b1d172361842423 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1575778 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/driver_common.c')
-rw-r--r--drivers/gpu/nvgpu/common/linux/driver_common.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/driver_common.c b/drivers/gpu/nvgpu/common/linux/driver_common.c
index 295297b6..e4a65692 100644
--- a/drivers/gpu/nvgpu/common/linux/driver_common.c
+++ b/drivers/gpu/nvgpu/common/linux/driver_common.c
@@ -39,8 +39,8 @@ static void nvgpu_init_vars(struct gk20a *g)
39 struct device *dev = dev_from_gk20a(g); 39 struct device *dev = dev_from_gk20a(g);
40 struct gk20a_platform *platform = dev_get_drvdata(dev); 40 struct gk20a_platform *platform = dev_get_drvdata(dev);
41 41
42 init_waitqueue_head(&l->sw_irq_stall_last_handled_wq); 42 nvgpu_cond_init(&l->sw_irq_stall_last_handled_wq);
43 init_waitqueue_head(&l->sw_irq_nonstall_last_handled_wq); 43 nvgpu_cond_init(&l->sw_irq_nonstall_last_handled_wq);
44 gk20a_init_gr(g); 44 gk20a_init_gr(g);
45 45
46 init_rwsem(&l->busy_lock); 46 init_rwsem(&l->busy_lock);
@@ -261,14 +261,14 @@ void nvgpu_wait_for_deferred_interrupts(struct gk20a *g)
261 int nonstall_irq_threshold = atomic_read(&l->hw_irq_nonstall_count); 261 int nonstall_irq_threshold = atomic_read(&l->hw_irq_nonstall_count);
262 262
263 /* wait until all stalling irqs are handled */ 263 /* wait until all stalling irqs are handled */
264 wait_event(l->sw_irq_stall_last_handled_wq, 264 NVGPU_COND_WAIT(&l->sw_irq_stall_last_handled_wq,
265 cyclic_delta(stall_irq_threshold, 265 cyclic_delta(stall_irq_threshold,
266 atomic_read(&l->sw_irq_stall_last_handled)) 266 atomic_read(&l->sw_irq_stall_last_handled))
267 <= 0); 267 <= 0, 0);
268 268
269 /* wait until all non-stalling irqs are handled */ 269 /* wait until all non-stalling irqs are handled */
270 wait_event(l->sw_irq_nonstall_last_handled_wq, 270 NVGPU_COND_WAIT(&l->sw_irq_nonstall_last_handled_wq,
271 cyclic_delta(nonstall_irq_threshold, 271 cyclic_delta(nonstall_irq_threshold,
272 atomic_read(&l->sw_irq_nonstall_last_handled)) 272 atomic_read(&l->sw_irq_nonstall_last_handled))
273 <= 0); 273 <= 0, 0);
274} 274}