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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-12-27 16:04:17 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2018-01-02 16:53:09 -0500
commit86691b59c6fae2b091855c0f4d44079cad8529b1 (patch)
treec9fd2914ed052771980298f5e77bd43d7c430ec9 /drivers/gpu/nvgpu/common/linux/debug_fifo.c
parent14fa8207e2f7feb36f8fa284b94859e05136eb0f (diff)
gpu: nvgpu: Remove bare channel scheduling
Remove scheduling IOCTL implementations for bare channels. Also removes code that constructs bare channels in runlist. Bug 1842197 Change-Id: I6e833b38e24a2f2c45c7993edf939d365eaf41f0 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1627326 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/linux/debug_fifo.c')
-rw-r--r--drivers/gpu/nvgpu/common/linux/debug_fifo.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/debug_fifo.c b/drivers/gpu/nvgpu/common/linux/debug_fifo.c
index 94a16b70..ad157ee7 100644
--- a/drivers/gpu/nvgpu/common/linux/debug_fifo.c
+++ b/drivers/gpu/nvgpu/common/linux/debug_fifo.c
@@ -81,16 +81,16 @@ static int gk20a_fifo_sched_debugfs_seq_show(
81 return ret; 81 return ret;
82 82
83 if (gk20a_channel_get(ch)) { 83 if (gk20a_channel_get(ch)) {
84 if (gk20a_is_channel_marked_as_tsg(ch)) 84 tsg = tsg_gk20a_from_ch(ch);
85 tsg = &f->tsg[ch->tsgid];
86 85
87 seq_printf(s, "%-8d %-8d %-8d %-9d %-8d %-10d %-8d %-8d\n", 86 if (tsg)
87 seq_printf(s, "%-8d %-8d %-8d %-9d %-8d %-10d %-8d %-8d\n",
88 ch->chid, 88 ch->chid,
89 ch->tsgid, 89 ch->tsgid,
90 ch->tgid, 90 ch->tgid,
91 tsg ? tsg->timeslice_us : ch->timeslice_us, 91 tsg->timeslice_us,
92 ch->timeout_ms_max, 92 ch->timeout_ms_max,
93 tsg ? tsg->interleave_level : ch->interleave_level, 93 tsg->interleave_level,
94 ch->ch_ctx.gr_ctx ? ch->ch_ctx.gr_ctx->graphics_preempt_mode : U32_MAX, 94 ch->ch_ctx.gr_ctx ? ch->ch_ctx.gr_ctx->graphics_preempt_mode : U32_MAX,
95 ch->ch_ctx.gr_ctx ? ch->ch_ctx.gr_ctx->compute_preempt_mode : U32_MAX); 95 ch->ch_ctx.gr_ctx ? ch->ch_ctx.gr_ctx->compute_preempt_mode : U32_MAX);
96 gk20a_channel_put(ch); 96 gk20a_channel_put(ch);