gpu: nvgpu: set FB/HSMMU debug mode

Set NV_PFB_HSMMU_PRI_MMU_DEBUG_CTRL and NV_PFB_PRI_MMU_DEBUG_CTRL
in addition to NV_PGRAPH_PRI_GPCS_MMU_DEBUG_CTRL, in
NVGPU_DBG_GPU_IOCTL_SET_CTX_MMU_DEBUG_MODE

Bug 2515097
Bug 2713590

Change-Id: I1763b43e79fac3edb68a35980683d58bfa89519f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2115785
(cherry picked from commit 8057514a9f7fc5f175e2e0571dfa91d78ebb6410)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208771
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kajetan Dutka <kdutka@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Kajetan Dutka <kdutka@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 24 insertions, 9 deletions

diff --git a/drivers/gpu/nvgpu/common/fifo/tsg.c b/drivers/gpu/nvgpu/common/fifo/tsg.c
index 5883667f..7f61b273 100644
--- a/drivers/gpu/nvgpu/common/fifo/tsg.c
+++ b/drivers/gpu/nvgpu/common/fifo/tsg.c
@@ -452,13 +452,15 @@ int nvgpu_tsg_set_mmu_debug_mode(struct tsg_gk20a *tsg,
         struct gk20a *g;
         int err = 0;
         u32 tsg_refcnt;
+        u32 fb_refcnt;
 
         if ((ch == NULL) || (tsg == NULL)) {
                 return -EINVAL;
         }
         g = ch->g;
 
-        if (g->ops.gr.set_mmu_debug_mode == NULL) {
+        if ((g->ops.fb.set_mmu_debug_mode == NULL) &&
+                (g->ops.gr.set_mmu_debug_mode == NULL)) {
                 return -ENOSYS;
         }
 
@@ -468,26 +470,39 @@ int nvgpu_tsg_set_mmu_debug_mode(struct tsg_gk20a *tsg,
                         return 0;
                 }
                 tsg_refcnt = tsg->mmu_debug_mode_refcnt + 1U;
+                fb_refcnt = g->mmu_debug_mode_refcnt + 1U;
         } else {
                 if (!ch->mmu_debug_mode_enabled) {
                         /* already disabled for this channel */
                         return 0;
                 }
                 tsg_refcnt = tsg->mmu_debug_mode_refcnt - 1U;
+                fb_refcnt = g->mmu_debug_mode_refcnt - 1U;
         }
 
-        /*
-         * enable GPC MMU debug mode if it was requested for at
-         * least one channel in the TSG
-         */
-        err = g->ops.gr.set_mmu_debug_mode(g, ch, tsg_refcnt > 0U);
-        if (err != 0) {
-                nvgpu_err(g, "set mmu debug mode failed, err=%d", err);
-                return err;
+        if (g->ops.gr.set_mmu_debug_mode != NULL) {
+                /*
+                 * enable GPC MMU debug mode if it was requested for at
+                 * least one channel in the TSG
+                 */
+                err = g->ops.gr.set_mmu_debug_mode(g, ch, tsg_refcnt > 0U);
+                if (err != 0) {
+                        nvgpu_err(g, "set mmu debug mode failed, err=%d", err);
+                        return err;
+                }
+        }
+
+        if (g->ops.fb.set_mmu_debug_mode != NULL) {
+                /*
+                 * enable FB/HS MMU debug mode if it was requested for
+                 * at least one TSG
+                 */
+                g->ops.fb.set_mmu_debug_mode(g, fb_refcnt > 0U);
         }
 
         ch->mmu_debug_mode_enabled = enable;
         tsg->mmu_debug_mode_refcnt = tsg_refcnt;
+        g->mmu_debug_mode_refcnt = fb_refcnt;
 
         return err;
 }