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authorAlex Waterman <alexw@nvidia.com>2018-09-18 15:59:40 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-11-16 18:12:34 -0500
commit20ac0d74cf0d1dc51fc94a830c2c5f5baadc6fd5 (patch)
tree072e45ab7c672eaa1992c5e82826baeac594e430 /drivers/gpu/nvgpu/common/fifo
parentabcbb58fe4a9af316bde4af58dc8f506a5dcdb59 (diff)
gpu: nvgpu: Fix comment in priv_cmd_buf allocation
Update the comment to fix obvious issues and describe the new allocation logic. Bug 2327792 Change-Id: Ica0dd4159467e3023cc487a2bf9f525db3ad76e6 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1831096 (cherry picked from commit c64f9432b13d47a791220578e823efcae4fe2a80) Reviewed-on: https://git-master.nvidia.com/r/1949221 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: James Norton <jnorton@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/fifo')
-rw-r--r--drivers/gpu/nvgpu/common/fifo/channel.c21
1 files changed, 14 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/common/fifo/channel.c b/drivers/gpu/nvgpu/common/fifo/channel.c
index 8af5f5e9..54fa4747 100644
--- a/drivers/gpu/nvgpu/common/fifo/channel.c
+++ b/drivers/gpu/nvgpu/common/fifo/channel.c
@@ -753,16 +753,23 @@ static int channel_gk20a_alloc_priv_cmdbuf(struct channel_gk20a *c,
753 * Any sync-pt fences will take less memory so we can ignore them for 753 * Any sync-pt fences will take less memory so we can ignore them for
754 * now. 754 * now.
755 * 755 *
756 * A semaphore ACQ (fence-wait) is 8 dwords: semaphore_a, semaphore_b, 756 * A semaphore ACQ (fence-wait) is 8 words: semaphore_a, semaphore_b,
757 * semaphore_c, and semaphore_d. A semaphore INCR (fence-get) will be 10 757 * semaphore_c, and semaphore_d. A semaphore INCR (fence-get) will be 10
758 * dwords: all the same as an ACQ plus a non-stalling intr which is 758 * words: all the same as an ACQ plus a non-stalling intr which is
759 * another 2 dwords. 759 * another 2 words.
760 * 760 *
761 * Lastly the number of gpfifo entries per channel is fixed so at most 761 * We have two cases to consider: the first is we base the size of the
762 * we can use 2/3rds of the gpfifo entries (1 pre-fence entry, one 762 * priv_cmd_buf on the gpfifo count. Here we multiply by a factor of
763 * userspace entry, and one post-fence entry). Thus the computation is: 763 * 2/3rds because only at most 2/3rds of the GPFIFO can be used for
764 * sync commands:
764 * 765 *
765 * (gpfifo entry number * (2 / 3) * (8 + 10) * 4 bytes. 766 * nr_gpfifos * (2 / 3) * (8 + 10) * 4 bytes
767 *
768 * If instead num_in_flight is specified then we will use that to size
769 * the priv_cmd_buf. The worst case is two sync commands (one ACQ and
770 * one INCR) per submit so we have a priv_cmd_buf size of:
771 *
772 * num_in_flight * (8 + 10) * 4 bytes
766 */ 773 */
767 size = num_in_flight * 18U * (u32)sizeof(u32); 774 size = num_in_flight * 18U * (u32)sizeof(u32);
768 if (gpfifo_based) { 775 if (gpfifo_based) {