diff options
author | Thomas Fleury <tfleury@nvidia.com> | 2019-04-30 20:19:51 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2020-01-30 02:42:34 -0500 |
commit | e0587aaf4d8f803004365eef2b08c0becd1042cb (patch) | |
tree | a6da9462840200e0b183868000e08fee749125c6 /drivers/gpu/nvgpu/common/fb | |
parent | 8110cee82842da134d3dfdc2e13406f1f94aa8ed (diff) |
gpu: nvgpu: set FB/HSMMU debug mode
Set NV_PFB_HSMMU_PRI_MMU_DEBUG_CTRL and NV_PFB_PRI_MMU_DEBUG_CTRL
in addition to NV_PGRAPH_PRI_GPCS_MMU_DEBUG_CTRL, in
NVGPU_DBG_GPU_IOCTL_SET_CTX_MMU_DEBUG_MODE
Bug 2515097
Bug 2713590
Change-Id: I1763b43e79fac3edb68a35980683d58bfa89519f
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2115785
(cherry picked from commit 8057514a9f7fc5f175e2e0571dfa91d78ebb6410)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2208771
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kajetan Dutka <kdutka@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Kajetan Dutka <kdutka@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/fb')
-rw-r--r-- | drivers/gpu/nvgpu/common/fb/fb_gm20b.c | 13 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/fb/fb_gm20b.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/fb/fb_gv100.c | 26 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/fb/fb_gv100.h | 3 |
4 files changed, 38 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gm20b.c b/drivers/gpu/nvgpu/common/fb/fb_gm20b.c index f62bf9df..739274c5 100644 --- a/drivers/gpu/nvgpu/common/fb/fb_gm20b.c +++ b/drivers/gpu/nvgpu/common/fb/fb_gm20b.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GM20B GPC MMU | 2 | * GM20B GPC MMU |
3 | * | 3 | * |
4 | * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -311,7 +311,7 @@ bool gm20b_fb_debug_mode_enabled(struct gk20a *g) | |||
311 | fb_mmu_debug_ctrl_debug_enabled_v(); | 311 | fb_mmu_debug_ctrl_debug_enabled_v(); |
312 | } | 312 | } |
313 | 313 | ||
314 | void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable) | 314 | void gm20b_fb_set_mmu_debug_mode(struct gk20a *g, bool enable) |
315 | { | 315 | { |
316 | u32 reg_val, fb_debug_ctrl; | 316 | u32 reg_val, fb_debug_ctrl; |
317 | 317 | ||
@@ -323,10 +323,15 @@ void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable) | |||
323 | g->mmu_debug_ctrl = false; | 323 | g->mmu_debug_ctrl = false; |
324 | } | 324 | } |
325 | 325 | ||
326 | reg_val = gk20a_readl(g, fb_mmu_debug_ctrl_r()); | 326 | reg_val = nvgpu_readl(g, fb_mmu_debug_ctrl_r()); |
327 | reg_val = set_field(reg_val, | 327 | reg_val = set_field(reg_val, |
328 | fb_mmu_debug_ctrl_debug_m(), fb_debug_ctrl); | 328 | fb_mmu_debug_ctrl_debug_m(), fb_debug_ctrl); |
329 | gk20a_writel(g, fb_mmu_debug_ctrl_r(), reg_val); | 329 | nvgpu_writel(g, fb_mmu_debug_ctrl_r(), reg_val); |
330 | } | ||
330 | 331 | ||
332 | void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable) | ||
333 | { | ||
334 | gm20b_fb_set_mmu_debug_mode(g, enable); | ||
331 | g->ops.gr.set_debug_mode(g, enable); | 335 | g->ops.gr.set_debug_mode(g, enable); |
332 | } | 336 | } |
337 | |||
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gm20b.h b/drivers/gpu/nvgpu/common/fb/fb_gm20b.h index d69f8618..aed9b43e 100644 --- a/drivers/gpu/nvgpu/common/fb/fb_gm20b.h +++ b/drivers/gpu/nvgpu/common/fb/fb_gm20b.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GM20B FB | 2 | * GM20B FB |
3 | * | 3 | * |
4 | * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -49,5 +49,6 @@ void gm20b_fb_read_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf); | |||
49 | int gm20b_fb_vpr_info_fetch(struct gk20a *g); | 49 | int gm20b_fb_vpr_info_fetch(struct gk20a *g); |
50 | bool gm20b_fb_debug_mode_enabled(struct gk20a *g); | 50 | bool gm20b_fb_debug_mode_enabled(struct gk20a *g); |
51 | void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable); | 51 | void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable); |
52 | void gm20b_fb_set_mmu_debug_mode(struct gk20a *g, bool enable); | ||
52 | 53 | ||
53 | #endif | 54 | #endif |
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gv100.c b/drivers/gpu/nvgpu/common/fb/fb_gv100.c index 193cf2f0..508259e7 100644 --- a/drivers/gpu/nvgpu/common/fb/fb_gv100.c +++ b/drivers/gpu/nvgpu/common/fb/fb_gv100.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GV100 FB | 2 | * GV100 FB |
3 | * | 3 | * |
4 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -300,3 +300,27 @@ size_t gv100_fb_get_vidmem_size(struct gk20a *g) | |||
300 | 300 | ||
301 | return bytes; | 301 | return bytes; |
302 | } | 302 | } |
303 | |||
304 | void gv100_fb_set_mmu_debug_mode(struct gk20a *g, bool enable) | ||
305 | { | ||
306 | u32 data, fb_ctrl, hsmmu_ctrl; | ||
307 | |||
308 | if (enable) { | ||
309 | fb_ctrl = fb_mmu_debug_ctrl_debug_enabled_f(); | ||
310 | hsmmu_ctrl = fb_hsmmu_pri_mmu_debug_ctrl_debug_enabled_f(); | ||
311 | g->mmu_debug_ctrl = true; | ||
312 | } else { | ||
313 | fb_ctrl = fb_mmu_debug_ctrl_debug_disabled_f(); | ||
314 | hsmmu_ctrl = fb_hsmmu_pri_mmu_debug_ctrl_debug_disabled_f(); | ||
315 | g->mmu_debug_ctrl = false; | ||
316 | } | ||
317 | |||
318 | data = nvgpu_readl(g, fb_mmu_debug_ctrl_r()); | ||
319 | data = set_field(data, fb_mmu_debug_ctrl_debug_m(), fb_ctrl); | ||
320 | nvgpu_writel(g, fb_mmu_debug_ctrl_r(), data); | ||
321 | |||
322 | data = nvgpu_readl(g, fb_hsmmu_pri_mmu_debug_ctrl_r()); | ||
323 | data = set_field(data, | ||
324 | fb_hsmmu_pri_mmu_debug_ctrl_debug_m(), hsmmu_ctrl); | ||
325 | nvgpu_writel(g, fb_hsmmu_pri_mmu_debug_ctrl_r(), data); | ||
326 | } | ||
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gv100.h b/drivers/gpu/nvgpu/common/fb/fb_gv100.h index 161d4cd7..b83f664a 100644 --- a/drivers/gpu/nvgpu/common/fb/fb_gv100.h +++ b/drivers/gpu/nvgpu/common/fb/fb_gv100.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GV100 FB | 2 | * GV100 FB |
3 | * | 3 | * |
4 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -34,5 +34,6 @@ int gv100_fb_memory_unlock(struct gk20a *g); | |||
34 | int gv100_fb_init_nvlink(struct gk20a *g); | 34 | int gv100_fb_init_nvlink(struct gk20a *g); |
35 | int gv100_fb_enable_nvlink(struct gk20a *g); | 35 | int gv100_fb_enable_nvlink(struct gk20a *g); |
36 | size_t gv100_fb_get_vidmem_size(struct gk20a *g); | 36 | size_t gv100_fb_get_vidmem_size(struct gk20a *g); |
37 | void gv100_fb_set_mmu_debug_mode(struct gk20a *g, bool enable); | ||
37 | 38 | ||
38 | #endif /* NVGPU_FB_GV100_H */ | 39 | #endif /* NVGPU_FB_GV100_H */ |