gpu: nvgpu: remove VPR HALs from dGPUs

gops.fb.dump_vpr_wpr_info() accesses both VPR and WPR registers.
Split this into two different HALs gops.fb.dump_vpr_info() and
gops.fb.dump_wpr_info()

Also unset HALs accessing VPR registers on dGPUs
We don't support VPR on dGPUs

Remove fb_mmu_vpr_info_r() register and all its accessors from
dGPU headers

Bug 2173122

Change-Id: I5b2712f8c5389e422a84c375a7e836add48bfd1c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1850947
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

3 files changed, 10 insertions, 7 deletions

diff --git a/drivers/gpu/nvgpu/common/fb/fb_gm20b.c b/drivers/gpu/nvgpu/common/fb/fb_gm20b.c
index bf509caf..f62bf9df 100644
--- a/drivers/gpu/nvgpu/common/fb/fb_gm20b.c
+++ b/drivers/gpu/nvgpu/common/fb/fb_gm20b.c
@@ -206,11 +206,11 @@ u32 gm20b_fb_compression_align_mask(struct gk20a *g)
         return SZ_64K - 1;
 }
 
-void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g)
+void gm20b_fb_dump_vpr_info(struct gk20a *g)
 {
         u32 val;
 
-        /* print vpr and wpr info */
+        /* print vpr info */
         val = gk20a_readl(g, fb_mmu_vpr_info_r());
         val &= ~0x3;
         val |= fb_mmu_vpr_info_index_addr_lo_v();
@@ -220,7 +220,13 @@ void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g)
                 gk20a_readl(g, fb_mmu_vpr_info_r()),
                 gk20a_readl(g, fb_mmu_vpr_info_r()),
                 gk20a_readl(g, fb_mmu_vpr_info_r()));
+}
 
+void gm20b_fb_dump_wpr_info(struct gk20a *g)
+{
+        u32 val;
+
+        /* print wpr info */
         val = gk20a_readl(g, fb_mmu_wpr_info_r());
         val &= ~0xf;
         val |= (fb_mmu_wpr_info_index_allow_read_v());
@@ -232,7 +238,6 @@ void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g)
                 gk20a_readl(g, fb_mmu_wpr_info_r()),
                 gk20a_readl(g, fb_mmu_wpr_info_r()),
                 gk20a_readl(g, fb_mmu_wpr_info_r()));
-
 }
 
 static int gm20b_fb_vpr_info_fetch_wait(struct gk20a *g,
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gm20b.h b/drivers/gpu/nvgpu/common/fb/fb_gm20b.h
index cb5b5d9a..d69f8618 100644
--- a/drivers/gpu/nvgpu/common/fb/fb_gm20b.h
+++ b/drivers/gpu/nvgpu/common/fb/fb_gm20b.h
@@ -43,7 +43,8 @@ u32 gm20b_fb_mmu_debug_rd(struct gk20a *g);
 unsigned int gm20b_fb_compression_page_size(struct gk20a *g);
 unsigned int gm20b_fb_compressible_page_size(struct gk20a *g);
 u32 gm20b_fb_compression_align_mask(struct gk20a *g);
-void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g);
+void gm20b_fb_dump_vpr_info(struct gk20a *g);
+void gm20b_fb_dump_wpr_info(struct gk20a *g);
 void gm20b_fb_read_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf);
 int gm20b_fb_vpr_info_fetch(struct gk20a *g);
 bool gm20b_fb_debug_mode_enabled(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gv100.c b/drivers/gpu/nvgpu/common/fb/fb_gv100.c
index 1088ca90..193cf2f0 100644
--- a/drivers/gpu/nvgpu/common/fb/fb_gv100.c
+++ b/drivers/gpu/nvgpu/common/fb/fb_gv100.c
@@ -141,9 +141,6 @@ int gv100_fb_memory_unlock(struct gk20a *g)
 
         nvgpu_log_fn(g, " ");
 
-        nvgpu_log_info(g, "fb_mmu_vpr_info = 0x%08x",
-                        gk20a_readl(g, fb_mmu_vpr_info_r()));
-
         /*
          * mem_unlock.bin should be written to install
          * traps even if VPR isn’t actually supported