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authorsmadhavan <smadhavan@nvidia.com>2018-09-14 00:51:53 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-25 00:17:39 -0400
commit75e59e40045c6fbf93c5b828d8a12ba84b573585 (patch)
tree849405a26ee469bad7914882027ee4d2bce4bbc9 /drivers/gpu/nvgpu/common/fb/fb_gv100.h
parentf93565c51fb465aebc34dc52fd704ba038c917f7 (diff)
nvgpu: common: MISRA Rule 21.2 header guard fixes
MISRA rule 21.2 doesn't allow the use of macro names which start with an underscore. These leading underscores are to be removed from the macro names. This patch will fix such violations in common directory by renaming them to follow the convention, 'NVGPU_PARENT-DIR_HEADER-NAME' when there is no keyword repetition between file name and directory or 'NVGPU_HEADER-NAME' when there is repetition. JIRA NVGPU-1028 Change-Id: Idf10f6b179cfd96bfb8ab8e9e2bf79c26591905d Signed-off-by: smadhavan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1809086 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/fb/fb_gv100.h')
-rw-r--r--drivers/gpu/nvgpu/common/fb/fb_gv100.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gv100.h b/drivers/gpu/nvgpu/common/fb/fb_gv100.h
index d47fded2..161d4cd7 100644
--- a/drivers/gpu/nvgpu/common/fb/fb_gv100.h
+++ b/drivers/gpu/nvgpu/common/fb/fb_gv100.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * GV100 FB 2 * GV100 FB
3 * 3 *
4 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -22,8 +22,8 @@
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24 24
25#ifndef _NVGPU_GV100_FB 25#ifndef NVGPU_FB_GV100_H
26#define _NVGPU_GV100_FB 26#define NVGPU_FB_GV100_H
27 27
28struct gk20a; 28struct gk20a;
29 29
@@ -35,4 +35,4 @@ int gv100_fb_init_nvlink(struct gk20a *g);
35int gv100_fb_enable_nvlink(struct gk20a *g); 35int gv100_fb_enable_nvlink(struct gk20a *g);
36size_t gv100_fb_get_vidmem_size(struct gk20a *g); 36size_t gv100_fb_get_vidmem_size(struct gk20a *g);
37 37
38#endif 38#endif /* NVGPU_FB_GV100_H */