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authorTerje Bergstrom <tbergstrom@nvidia.com>2018-08-16 17:27:35 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-09-04 19:15:34 -0400
commita6499fb9ceddd9ea52cf7e67789a64131545295c (patch)
tree488c9768a74a71112dcfcac459fa3727aee66195 /drivers/gpu/nvgpu/common/fb/fb_gm20b.c
parent2e051a78a513e021ac84a3da77b778c591284983 (diff)
gpu: nvgpu: Bump FB gk20a code to gm20b
Move all code from fb_gk20a.c to fb_gm20b.c. Change-Id: I87fbdfee76599e019564d66bf248aaffcf978498 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1801422 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/fb/fb_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/common/fb/fb_gm20b.c92
1 files changed, 91 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/common/fb/fb_gm20b.c b/drivers/gpu/nvgpu/common/fb/fb_gm20b.c
index 4ad8b722..b4756546 100644
--- a/drivers/gpu/nvgpu/common/fb/fb_gm20b.c
+++ b/drivers/gpu/nvgpu/common/fb/fb_gm20b.c
@@ -22,22 +22,112 @@
22 * DEALINGS IN THE SOFTWARE. 22 * DEALINGS IN THE SOFTWARE.
23 */ 23 */
24 24
25#include <trace/events/gk20a.h>
26
25#include <nvgpu/sizes.h> 27#include <nvgpu/sizes.h>
26#include <nvgpu/utils.h> 28#include <nvgpu/utils.h>
27 29
28#include "gk20a/gk20a.h" 30#include "gk20a/gk20a.h"
29 31
30#include "fb_gk20a.h"
31#include "fb_gm20b.h" 32#include "fb_gm20b.h"
32 33
33#include <nvgpu/io.h> 34#include <nvgpu/io.h>
34#include <nvgpu/timers.h> 35#include <nvgpu/timers.h>
35 36
37#include <nvgpu/hw/gm20b/hw_mc_gm20b.h>
36#include <nvgpu/hw/gm20b/hw_fb_gm20b.h> 38#include <nvgpu/hw/gm20b/hw_fb_gm20b.h>
37 39
38#define VPR_INFO_FETCH_WAIT (5) 40#define VPR_INFO_FETCH_WAIT (5)
39#define WPR_INFO_ADDR_ALIGNMENT 0x0000000c 41#define WPR_INFO_ADDR_ALIGNMENT 0x0000000c
40 42
43void gm20b_fb_reset(struct gk20a *g)
44{
45 u32 val;
46
47 nvgpu_log_info(g, "reset gk20a fb");
48
49 val = gk20a_readl(g, mc_elpg_enable_r());
50 val |= mc_elpg_enable_xbar_enabled_f()
51 | mc_elpg_enable_pfb_enabled_f()
52 | mc_elpg_enable_hub_enabled_f();
53 gk20a_writel(g, mc_elpg_enable_r(), val);
54}
55
56void gm20b_fb_init_hw(struct gk20a *g)
57{
58 u32 addr = nvgpu_mem_get_addr(g, &g->mm.sysmem_flush) >> 8;
59
60 gk20a_writel(g, fb_niso_flush_sysmem_addr_r(), addr);
61}
62
63void gm20b_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb)
64{
65 struct nvgpu_timeout timeout;
66 u32 addr_lo;
67 u32 data;
68
69 nvgpu_log_fn(g, " ");
70
71 /* pagetables are considered sw states which are preserved after
72 prepare_poweroff. When gk20a deinit releases those pagetables,
73 common code in vm unmap path calls tlb invalidate that touches
74 hw. Use the power_on flag to skip tlb invalidation when gpu
75 power is turned off */
76
77 if (!g->power_on) {
78 return;
79 }
80
81 addr_lo = u64_lo32(nvgpu_mem_get_addr(g, pdb) >> 12);
82
83 nvgpu_mutex_acquire(&g->mm.tlb_lock);
84
85 trace_gk20a_mm_tlb_invalidate(g->name);
86
87 nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER);
88
89 do {
90 data = gk20a_readl(g, fb_mmu_ctrl_r());
91 if (fb_mmu_ctrl_pri_fifo_space_v(data) != 0) {
92 break;
93 }
94 nvgpu_udelay(2);
95 } while (!nvgpu_timeout_expired_msg(&timeout,
96 "wait mmu fifo space"));
97
98 if (nvgpu_timeout_peek_expired(&timeout)) {
99 goto out;
100 }
101
102 nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER);
103
104 gk20a_writel(g, fb_mmu_invalidate_pdb_r(),
105 fb_mmu_invalidate_pdb_addr_f(addr_lo) |
106 nvgpu_aperture_mask(g, pdb,
107 fb_mmu_invalidate_pdb_aperture_sys_mem_f(),
108 fb_mmu_invalidate_pdb_aperture_sys_mem_f(),
109 fb_mmu_invalidate_pdb_aperture_vid_mem_f()));
110
111 gk20a_writel(g, fb_mmu_invalidate_r(),
112 fb_mmu_invalidate_all_va_true_f() |
113 fb_mmu_invalidate_trigger_true_f());
114
115 do {
116 data = gk20a_readl(g, fb_mmu_ctrl_r());
117 if (fb_mmu_ctrl_pri_fifo_empty_v(data) !=
118 fb_mmu_ctrl_pri_fifo_empty_false_f()) {
119 break;
120 }
121 nvgpu_udelay(2);
122 } while (!nvgpu_timeout_expired_msg(&timeout,
123 "wait mmu invalidate"));
124
125 trace_gk20a_mm_tlb_invalidate_done(g->name);
126
127out:
128 nvgpu_mutex_release(&g->mm.tlb_lock);
129}
130
41void fb_gm20b_init_fs_state(struct gk20a *g) 131void fb_gm20b_init_fs_state(struct gk20a *g)
42{ 132{
43 nvgpu_log_info(g, "initialize gm20b fb"); 133 nvgpu_log_info(g, "initialize gm20b fb");