gpu: nvgpu: Fix mutex MISRA 17.7 violations

MISRA Rule-17.7 requires the return value of all functions to be used.
Fix is either to use the return value or change the function to return
void. This patch contains fix for calls to nvgpu_mutex_init and
improves related error handling.

JIRA NVGPU-677

Change-Id: I609fa138520cc7ccfdd5aa0e7fd28c8ca0b3a21c
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1805598
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 9 insertions, 5 deletions

diff --git a/drivers/gpu/nvgpu/common/falcon/falcon.c b/drivers/gpu/nvgpu/common/falcon/falcon.c
index 81ba5e81..6e5a477d 100644
--- a/drivers/gpu/nvgpu/common/falcon/falcon.c
+++ b/drivers/gpu/nvgpu/common/falcon/falcon.c
@@ -397,10 +397,11 @@ int nvgpu_flcn_bl_bootstrap(struct nvgpu_falcon *flcn,
         return status;
 }
 
-void nvgpu_flcn_sw_init(struct gk20a *g, u32 flcn_id)
+int nvgpu_flcn_sw_init(struct gk20a *g, u32 flcn_id)
 {
         struct nvgpu_falcon *flcn = NULL;
         struct gpu_ops *gops = &g->ops;
+        int err = 0;
 
         switch (flcn_id) {
         case FALCON_ID_PMU:
@@ -431,12 +432,15 @@ void nvgpu_flcn_sw_init(struct gk20a *g, u32 flcn_id)
                 break;
         default:
                 nvgpu_err(g, "Invalid/Unsupported falcon ID %x", flcn_id);
+                err = -ENODEV;
                 break;
         };
 
-        /* call to HAL method to assign flcn base & ops to selected falcon */
-        if (flcn) {
-                flcn->g = g;
-                gops->falcon.falcon_hal_sw_init(flcn);
+        if (err != 0) {
+                return err;
         }
+
+        /* call to HAL method to assign flcn base & ops to selected falcon */
+        flcn->g = g;
+        return gops->falcon.falcon_hal_sw_init(flcn);
 }