diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-05-24 15:31:57 -0400 |
---|---|---|
committer | Tejal Kudav <tkudav@nvidia.com> | 2018-06-14 09:44:07 -0400 |
commit | ed65f1f26e2d0ca4a491215297b61d25b0c1493b (patch) | |
tree | ad4ce439a0f77fe89f9138e6f4284aeaa996b4c8 /drivers/gpu/nvgpu/common/bus | |
parent | 4eae06299ba35e3f6a48eef4a19cde6d1c374deb (diff) |
gpu: nvgpu: Move setting priv interrupt to priv_ring
Registers to set priv interrupts are in priv_ring, but the code was
in bus HAL. Move the code and related HALs to priv_ring instead.
JIRA NVGPU-588
Change-Id: I708d11f77405dbba86586a0d1da42f65bcc1de9d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1730889
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/bus')
-rw-r--r-- | drivers/gpu/nvgpu/common/bus/bus_gk20a.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/common/bus/bus_gk20a.h | 1 |
2 files changed, 0 insertions, 15 deletions
diff --git a/drivers/gpu/nvgpu/common/bus/bus_gk20a.c b/drivers/gpu/nvgpu/common/bus/bus_gk20a.c index 46065579..62dd7450 100644 --- a/drivers/gpu/nvgpu/common/bus/bus_gk20a.c +++ b/drivers/gpu/nvgpu/common/bus/bus_gk20a.c | |||
@@ -31,9 +31,6 @@ | |||
31 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | 31 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> |
32 | #include <nvgpu/hw/gk20a/hw_gr_gk20a.h> | 32 | #include <nvgpu/hw/gk20a/hw_gr_gk20a.h> |
33 | #include <nvgpu/hw/gk20a/hw_timer_gk20a.h> | 33 | #include <nvgpu/hw/gk20a/hw_timer_gk20a.h> |
34 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_sys_gk20a.h> | ||
35 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_gpc_gk20a.h> | ||
36 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_fbp_gk20a.h> | ||
37 | 34 | ||
38 | void gk20a_bus_init_hw(struct gk20a *g) | 35 | void gk20a_bus_init_hw(struct gk20a *g) |
39 | { | 36 | { |
@@ -172,14 +169,3 @@ int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst) | |||
172 | 169 | ||
173 | return 0; | 170 | return 0; |
174 | } | 171 | } |
175 | |||
176 | void gk20a_bus_set_ppriv_timeout_settings(struct gk20a *g) | ||
177 | { | ||
178 | /* | ||
179 | * Bug 1340570: increase the clock timeout to avoid potential | ||
180 | * operation failure at high gpcclk rate. Default values are 0x400. | ||
181 | */ | ||
182 | nvgpu_writel(g, pri_ringstation_sys_master_config_r(0x15), 0x800); | ||
183 | nvgpu_writel(g, pri_ringstation_gpc_master_config_r(0xa), 0x800); | ||
184 | nvgpu_writel(g, pri_ringstation_fbp_master_config_r(0x8), 0x800); | ||
185 | } | ||
diff --git a/drivers/gpu/nvgpu/common/bus/bus_gk20a.h b/drivers/gpu/nvgpu/common/bus/bus_gk20a.h index 8c07d1fe..1f81a4b0 100644 --- a/drivers/gpu/nvgpu/common/bus/bus_gk20a.h +++ b/drivers/gpu/nvgpu/common/bus/bus_gk20a.h | |||
@@ -32,6 +32,5 @@ void gk20a_bus_isr(struct gk20a *g); | |||
32 | int gk20a_read_ptimer(struct gk20a *g, u64 *value); | 32 | int gk20a_read_ptimer(struct gk20a *g, u64 *value); |
33 | void gk20a_bus_init_hw(struct gk20a *g); | 33 | void gk20a_bus_init_hw(struct gk20a *g); |
34 | int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst); | 34 | int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst); |
35 | void gk20a_bus_set_ppriv_timeout_settings(struct gk20a *g); | ||
36 | 35 | ||
37 | #endif /* GK20A_H */ | 36 | #endif /* GK20A_H */ |