gpu: nvgpu: common: Fix MISRA 15.6 violations

MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces,
including single statement blocks. Fix errors due to single statement
if blocks without braces, introducing the braces.

JIRA NVGPU-671

Change-Id: I599cce2af1d6cdc24efefba4ec42abfe998aec47
Signed-off-by: Srirangan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1795845
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2 files changed, 8 insertions, 4 deletions

diff --git a/drivers/gpu/nvgpu/common/bus/bus_gm20b.c b/drivers/gpu/nvgpu/common/bus/bus_gm20b.c
index d2c4c2b7..ef5fee8c 100644
--- a/drivers/gpu/nvgpu/common/bus/bus_gm20b.c
+++ b/drivers/gpu/nvgpu/common/bus/bus_gm20b.c
@@ -53,14 +53,16 @@ int gm20b_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst)
                 u32 val = gk20a_readl(g, bus_bind_status_r());
                 u32 pending = bus_bind_status_bar1_pending_v(val);
                 u32 outstanding = bus_bind_status_bar1_outstanding_v(val);
-                if (!pending && !outstanding)
+                if (!pending && !outstanding) {
                         break;
+                }
 
                 nvgpu_udelay(5);
         } while (!nvgpu_timeout_expired(&timeout));
 
-        if (nvgpu_timeout_peek_expired(&timeout))
+        if (nvgpu_timeout_peek_expired(&timeout)) {
                 err = -EINVAL;
+        }
 
         return err;
 }
diff --git a/drivers/gpu/nvgpu/common/bus/bus_gp10b.c b/drivers/gpu/nvgpu/common/bus/bus_gp10b.c
index 11e60c53..8aa75d8d 100644
--- a/drivers/gpu/nvgpu/common/bus/bus_gp10b.c
+++ b/drivers/gpu/nvgpu/common/bus/bus_gp10b.c
@@ -50,14 +50,16 @@ int gp10b_bus_bar2_bind(struct gk20a *g, struct nvgpu_mem *bar2_inst)
                 u32 val = gk20a_readl(g, bus_bind_status_r());
                 u32 pending = bus_bind_status_bar2_pending_v(val);
                 u32 outstanding = bus_bind_status_bar2_outstanding_v(val);
-                if (!pending && !outstanding)
+                if (!pending && !outstanding) {
                         break;
+                }
 
                 nvgpu_udelay(5);
         } while (!nvgpu_timeout_expired(&timeout));
 
-        if (nvgpu_timeout_peek_expired(&timeout))
+        if (nvgpu_timeout_peek_expired(&timeout)) {
                 err = -EINVAL;
+        }
 
         return err;
 }