gpu: nvgpu: Remove gk20a_dbg* functions

Switch all logging to nvgpu_log*(). gk20a_dbg* macros are
intentionally left there because of use from other repositories.

Because the new functions do not work without a pointer to struct
gk20a, and piping it just for logging is excessive, some log messages
are deleted.

Change-Id: I00e22e75fe4596a330bb0282ab4774b3639ee31e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1704148
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

7 files changed, 105 insertions, 105 deletions

diff --git a/drivers/gpu/nvgpu/clk/clk.c b/drivers/gpu/nvgpu/clk/clk.c
index ecc352b1..a8d99bbb 100644
--- a/drivers/gpu/nvgpu/clk/clk.c
+++ b/drivers/gpu/nvgpu/clk/clk.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -43,7 +43,7 @@ static void clkrpc_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
         struct clkrpc_pmucmdhandler_params *phandlerparams =
                 (struct clkrpc_pmucmdhandler_params *)param;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         if (msg->msg.clk.msg_type != NV_PMU_CLK_MSG_ID_RPC) {
                 nvgpu_err(g, "unsupported msg for VFE LOAD RPC %x",
diff --git a/drivers/gpu/nvgpu/clk/clk_domain.c b/drivers/gpu/nvgpu/clk/clk_domain.c
index 1d47d2d5..f306cf56 100644
--- a/drivers/gpu/nvgpu/clk/clk_domain.c
+++ b/drivers/gpu/nvgpu/clk/clk_domain.c
@@ -153,7 +153,7 @@ static u32 _clk_domains_pmudata_instget(struct gk20a *g,
                 (struct nv_pmu_clk_clk_domain_boardobj_grp_set *)
                 pmuboardobjgrp;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
@@ -162,7 +162,7 @@ static u32 _clk_domains_pmudata_instget(struct gk20a *g,
 
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &pgrp_set->objects[idx].data.board_obj;
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
         return 0;
 }
 
@@ -176,7 +176,7 @@ u32 clk_domain_sw_setup(struct gk20a *g)
         struct clk_domain_3x_slave *pdomain_slave;
         u8 i;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = boardobjgrpconstruct_e32(g, &g->clk_pmu.clk_domainobjs.super);
         if (status) {
@@ -255,7 +255,7 @@ u32 clk_domain_sw_setup(struct gk20a *g)
         }
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
 
@@ -264,7 +264,7 @@ u32 clk_domain_pmu_setup(struct gk20a *g)
         u32 status;
         struct boardobjgrp *pboardobjgrp = NULL;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         pboardobjgrp = &g->clk_pmu.clk_domainobjs.super.super;
 
@@ -273,7 +273,7 @@ u32 clk_domain_pmu_setup(struct gk20a *g)
 
         status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
 
-        gk20a_dbg_info("Done");
+        nvgpu_log_info(g, "Done");
         return status;
 }
 
@@ -298,7 +298,7 @@ static u32 devinit_get_clocks_table(struct gk20a *g,
                 struct clk_domain_3x_slave v3x_slave;
         } clk_domain_data;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         clocks_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
                         g->bios.clock_token, CLOCKS_TABLE);
@@ -459,7 +459,7 @@ static u32 devinit_get_clocks_table(struct gk20a *g,
         }
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
 
@@ -467,7 +467,7 @@ static u32 clkdomainclkproglink_not_supported(struct gk20a *g,
                                               struct clk_pmupstate *pclk,
                                               struct clk_domain *pdomain)
 {
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
         return -EINVAL;
 }
 
@@ -480,7 +480,7 @@ static int clkdomainvfsearch_stub(
         u8 rail)
 
 {
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
         return -EINVAL;
 }
 
@@ -492,7 +492,7 @@ static u32 clkdomaingetfpoints_stub(
         u16 *pfreqpointsinmhz,
         u8 rail)
 {
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
         return -EINVAL;
 }
 
@@ -541,7 +541,7 @@ static u32 _clk_domain_pmudatainit_3x(struct gk20a *g,
         struct clk_domain_3x *pclk_domain_3x;
         struct nv_pmu_clk_clk_domain_3x_boardobj_set *pset;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = clk_domain_pmudatainit_super(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -592,7 +592,7 @@ static u32 clkdomainclkproglink_3x_prog(struct gk20a *g,
         struct clk_prog *pprog = NULL;
         u8 i;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         for (i = p3xprog->clk_prog_idx_first;
              i <= p3xprog->clk_prog_idx_last;
@@ -616,7 +616,7 @@ static int clkdomaingetslaveclk(struct gk20a *g,
         u8 slaveidx;
         struct clk_domain_3x_master *p3xmaster;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         if (pclkmhz == NULL)
                 return -EINVAL;
@@ -657,7 +657,7 @@ static int clkdomainvfsearch(struct gk20a *g,
         u16 bestclkmhz;
         u32 bestvoltuv;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         if ((pclkmhz == NULL) || (pvoltuv == NULL))
                 return -EINVAL;
@@ -719,7 +719,7 @@ static int clkdomainvfsearch(struct gk20a *g,
                 goto done;
         }
 done:
-        gk20a_dbg_info("done status %x", status);
+        nvgpu_log_info(g, "done status %x", status);
         return status;
 }
 
@@ -744,7 +744,7 @@ static u32 clkdomaingetfpoints
         u16 *freqpointsdata;
         u8 i;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         if (pfpointscount == NULL)
                 return -EINVAL;
@@ -783,7 +783,7 @@ static u32 clkdomaingetfpoints
 
         *pfpointscount = totalcount;
 done:
-        gk20a_dbg_info("done status %x", status);
+        nvgpu_log_info(g, "done status %x", status);
         return status;
 }
 
@@ -796,7 +796,7 @@ static u32 _clk_domain_pmudatainit_3x_prog(struct gk20a *g,
         struct nv_pmu_clk_clk_domain_3x_prog_boardobj_set *pset;
         struct clk_domains *pdomains = &(g->clk_pmu.clk_domainobjs);
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = _clk_domain_pmudatainit_3x(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -876,7 +876,7 @@ static u32 _clk_domain_pmudatainit_3x_slave(struct gk20a *g,
         struct clk_domain_3x_slave *pclk_domain_3x_slave;
         struct nv_pmu_clk_clk_domain_3x_slave_boardobj_set *pset;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = _clk_domain_pmudatainit_3x_prog(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -935,7 +935,7 @@ static u32 clkdomainclkproglink_3x_master(struct gk20a *g,
         u16 freq_max_last_mhz = 0;
         u8 i;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = clkdomainclkproglink_3x_prog(g, pclk, pdomain);
         if (status)
@@ -961,7 +961,7 @@ static u32 clkdomainclkproglink_3x_master(struct gk20a *g,
                         goto done;
         }
 done:
-        gk20a_dbg_info("done status %x", status);
+        nvgpu_log_info(g, "done status %x", status);
         return status;
 }
 
@@ -973,7 +973,7 @@ static u32 _clk_domain_pmudatainit_3x_master(struct gk20a *g,
         struct clk_domain_3x_master *pclk_domain_3x_master;
         struct nv_pmu_clk_clk_domain_3x_master_boardobj_set *pset;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = _clk_domain_pmudatainit_3x_prog(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -1021,7 +1021,7 @@ static u32 clkdomainclkproglink_fixed(struct gk20a *g,
                                       struct clk_pmupstate *pclk,
                                       struct clk_domain *pdomain)
 {
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
         return 0;
 }
 
@@ -1033,7 +1033,7 @@ static u32 _clk_domain_pmudatainit_3x_fixed(struct gk20a *g,
         struct clk_domain_3x_fixed *pclk_domain_3x_fixed;
         struct nv_pmu_clk_clk_domain_3x_fixed_boardobj_set *pset;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = _clk_domain_pmudatainit_3x(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -1085,7 +1085,7 @@ static struct clk_domain *construct_clk_domain(struct gk20a *g, void *pargs)
         struct boardobj *board_obj_ptr = NULL;
         u32 status;
 
-        gk20a_dbg_info(" %d", BOARDOBJ_GET_TYPE(pargs));
+        nvgpu_log_info(g, " %d", BOARDOBJ_GET_TYPE(pargs));
         switch (BOARDOBJ_GET_TYPE(pargs)) {
         case CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED:
                 status = clk_domain_construct_3x_fixed(g, &board_obj_ptr,
@@ -1109,7 +1109,7 @@ static struct clk_domain *construct_clk_domain(struct gk20a *g, void *pargs)
         if (status)
                 return NULL;
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return (struct clk_domain *)board_obj_ptr;
 }
@@ -1122,7 +1122,7 @@ static u32 clk_domain_pmudatainit_super(struct gk20a *g,
         struct clk_domain *pclk_domain;
         struct nv_pmu_clk_clk_domain_boardobj_set *pset;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
         if (status != 0)
diff --git a/drivers/gpu/nvgpu/clk/clk_fll.c b/drivers/gpu/nvgpu/clk/clk_fll.c
index 15d386d5..87222b90 100644
--- a/drivers/gpu/nvgpu/clk/clk_fll.c
+++ b/drivers/gpu/nvgpu/clk/clk_fll.c
@@ -50,7 +50,7 @@ static u32 _clk_fll_devgrp_pmudatainit_super(struct gk20a *g,
                 pboardobjgrp;
         u32 status = 0;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu);
         if (status) {
@@ -67,7 +67,7 @@ static u32 _clk_fll_devgrp_pmudatainit_super(struct gk20a *g,
                 pfll_objs->lut_prog_master_mask.super.bitcount,
                 &pset->lut_prog_master_mask.super);
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
         return status;
 }
 
@@ -80,7 +80,7 @@ static u32 _clk_fll_devgrp_pmudata_instget(struct gk20a *g,
                 (struct nv_pmu_clk_clk_fll_device_boardobj_grp_set *)
                 pmuboardobjgrp;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
@@ -89,7 +89,7 @@ static u32 _clk_fll_devgrp_pmudata_instget(struct gk20a *g,
 
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &pgrp_set->objects[idx].data.board_obj;
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
         return 0;
 }
 
@@ -123,7 +123,7 @@ u32 clk_fll_sw_setup(struct gk20a *g)
         u8 i;
         u8 j;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = boardobjgrpconstruct_e32(g, &g->clk_pmu.avfs_fllobjs.super);
         if (status) {
@@ -202,7 +202,7 @@ u32 clk_fll_sw_setup(struct gk20a *g)
                 }
         }
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
 
@@ -211,7 +211,7 @@ u32 clk_fll_pmu_setup(struct gk20a *g)
         u32 status;
         struct boardobjgrp *pboardobjgrp = NULL;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         pboardobjgrp = &g->clk_pmu.avfs_fllobjs.super.super;
 
@@ -220,7 +220,7 @@ u32 clk_fll_pmu_setup(struct gk20a *g)
 
         status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
 
-        gk20a_dbg_info("Done");
+        nvgpu_log_info(g, "Done");
         return status;
 }
 
@@ -241,7 +241,7 @@ static u32 devinit_get_fll_device_table(struct gk20a *g,
         u32 vbios_domain = NV_PERF_DOMAIN_4X_CLOCK_DOMAIN_SKIP;
         struct avfsvinobjs *pvinobjs = &g->clk_pmu.avfs_vinobjs;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         fll_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
                           g->bios.clock_token, FLL_TABLE);
@@ -350,7 +350,7 @@ static u32 devinit_get_fll_device_table(struct gk20a *g,
         }
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
 
@@ -399,7 +399,7 @@ static struct fll_device *construct_fll_device(struct gk20a *g,
         struct fll_device *board_obj_fll_ptr = NULL;
         u32 status;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
         status = boardobj_construct_super(g, &board_obj_ptr,
                 sizeof(struct fll_device), pargs);
         if (status)
@@ -429,7 +429,7 @@ static struct fll_device *construct_fll_device(struct gk20a *g,
         boardobjgrpmask_e32_init(
                 &board_obj_fll_ptr->lut_prog_broadcast_slave_mask, NULL);
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return (struct fll_device *)board_obj_ptr;
 }
@@ -442,7 +442,7 @@ static u32 fll_device_init_pmudata_super(struct gk20a *g,
         struct fll_device *pfll_dev;
         struct nv_pmu_clk_clk_fll_device_boardobj_set *perf_pmu_data;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -473,7 +473,7 @@ static u32 fll_device_init_pmudata_super(struct gk20a *g,
                 pfll_dev->lut_prog_broadcast_slave_mask.super.bitcount,
                 &perf_pmu_data->lut_prog_broadcast_slave_mask.super);
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return status;
 }
diff --git a/drivers/gpu/nvgpu/clk/clk_freq_controller.c b/drivers/gpu/nvgpu/clk/clk_freq_controller.c
index fce177a7..9091f71b 100644
--- a/drivers/gpu/nvgpu/clk/clk_freq_controller.c
+++ b/drivers/gpu/nvgpu/clk/clk_freq_controller.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -321,7 +321,7 @@ u32 clk_freq_controller_pmu_setup(struct gk20a *g)
         u32 status;
         struct boardobjgrp *pboardobjgrp = NULL;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         pboardobjgrp = &g->clk_pmu.clk_freq_controllers.super.super;
 
@@ -330,7 +330,7 @@ u32 clk_freq_controller_pmu_setup(struct gk20a *g)
 
         status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
 
-        gk20a_dbg_info("Done");
+        nvgpu_log_info(g, "Done");
         return status;
 }
 
@@ -343,7 +343,7 @@ static u32 _clk_freq_controller_devgrp_pmudata_instget(struct gk20a *g,
                 (struct nv_pmu_clk_clk_freq_controller_boardobj_grp_set *)
                 pmuboardobjgrp;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
@@ -352,7 +352,7 @@ static u32 _clk_freq_controller_devgrp_pmudata_instget(struct gk20a *g,
 
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &pgrp_set->objects[idx].data.board_obj;
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
         return 0;
 }
 
@@ -392,7 +392,7 @@ u32 clk_freq_controller_sw_setup(struct gk20a *g)
         u8 i;
         u8 j;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         pclk_freq_controllers = &g->clk_pmu.clk_freq_controllers;
         status = boardobjgrpconstruct_e32(g, &pclk_freq_controllers->super);
@@ -447,6 +447,6 @@ u32 clk_freq_controller_sw_setup(struct gk20a *g)
                         freq_ctrl_load_mask.super, i);
         }
 done:
-                gk20a_dbg_info(" done status %x", status);
+                nvgpu_log_info(g, " done status %x", status);
                 return status;
 }
diff --git a/drivers/gpu/nvgpu/clk/clk_prog.c b/drivers/gpu/nvgpu/clk/clk_prog.c
index 6b5315b4..8926b9f5 100644
--- a/drivers/gpu/nvgpu/clk/clk_prog.c
+++ b/drivers/gpu/nvgpu/clk/clk_prog.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -72,7 +72,7 @@ static u32 _clk_progs_pmudata_instget(struct gk20a *g,
         struct nv_pmu_clk_clk_prog_boardobj_grp_set  *pgrp_set =
                 (struct nv_pmu_clk_clk_prog_boardobj_grp_set *)pmuboardobjgrp;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
@@ -81,7 +81,7 @@ static u32 _clk_progs_pmudata_instget(struct gk20a *g,
 
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &pgrp_set->objects[idx].data.board_obj;
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
         return 0;
 }
 
@@ -91,7 +91,7 @@ u32 clk_prog_sw_setup(struct gk20a *g)
         struct boardobjgrp *pboardobjgrp = NULL;
         struct clk_progs *pclkprogobjs;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = boardobjgrpconstruct_e255(g, &g->clk_pmu.clk_progobjs.super);
         if (status) {
@@ -130,7 +130,7 @@ u32 clk_prog_sw_setup(struct gk20a *g)
 
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
 
@@ -139,7 +139,7 @@ u32 clk_prog_pmu_setup(struct gk20a *g)
         u32 status;
         struct boardobjgrp *pboardobjgrp = NULL;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         pboardobjgrp = &g->clk_pmu.clk_progobjs.super.super;
 
@@ -148,7 +148,7 @@ u32 clk_prog_pmu_setup(struct gk20a *g)
 
         status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
 
-        gk20a_dbg_info("Done");
+        nvgpu_log_info(g, "Done");
         return status;
 }
 
@@ -186,7 +186,7 @@ static u32 devinit_get_clk_prog_table(struct gk20a *g,
                 struct clk_prog_1x_master_table v1x_master_table;
         } prog_data;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         clkprogs_tbl_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
                         g->bios.clock_token, CLOCK_PROGRAMMING_TABLE);
@@ -372,7 +372,7 @@ static u32 devinit_get_clk_prog_table(struct gk20a *g,
                 }
         }
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
 
@@ -382,7 +382,7 @@ static u32 _clk_prog_pmudatainit_super(struct gk20a *g,
 {
         u32 status = 0;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
         return status;
@@ -396,7 +396,7 @@ static u32 _clk_prog_pmudatainit_1x(struct gk20a *g,
         struct clk_prog_1x *pclk_prog_1x;
         struct nv_pmu_clk_clk_prog_1x_boardobj_set *pset;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = _clk_prog_pmudatainit_super(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -424,7 +424,7 @@ static u32 _clk_prog_pmudatainit_1x_master(struct gk20a *g,
         u32 vfsize = sizeof(struct ctrl_clk_clk_prog_1x_master_vf_entry) *
                 g->clk_pmu.clk_progobjs.vf_entry_count;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = _clk_prog_pmudatainit_1x(g, board_obj_ptr, ppmudata);
 
@@ -455,7 +455,7 @@ static u32 _clk_prog_pmudatainit_1x_master_ratio(struct gk20a *g,
         u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) *
                 g->clk_pmu.clk_progobjs.slave_entry_count;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = _clk_prog_pmudatainit_1x_master(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -483,7 +483,7 @@ static u32 _clk_prog_pmudatainit_1x_master_table(struct gk20a *g,
         u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) *
                 g->clk_pmu.clk_progobjs.slave_entry_count;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = _clk_prog_pmudatainit_1x_master(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -510,7 +510,7 @@ static u32 _clk_prog_1x_master_rail_construct_vf_point(struct gk20a *g,
         struct clk_vf_point *p_vf_point;
         u32 status;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         p_vf_point = construct_clk_vf_point(g, (void *)p_vf_point_tmp);
         if (p_vf_point == NULL) {
@@ -527,7 +527,7 @@ static u32 _clk_prog_1x_master_rail_construct_vf_point(struct gk20a *g,
         p_vf_rail->vf_point_idx_last = (*p_vf_point_idx)++;
 
 done:
-        gk20a_dbg_info("done status %x", status);
+        nvgpu_log_info(g, "done status %x", status);
         return status;
 }
 
@@ -561,7 +561,7 @@ static u32 clk_prog_construct_1x(struct gk20a *g,
                         (struct clk_prog_1x *)pargs;
         u32 status = 0;
 
-        gk20a_dbg_info(" ");
+        nvgpu_log_info(g, " ");
         ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_PROG_TYPE_1X);
         status = clk_prog_construct_super(g, ppboardobj, size, pargs);
         if (status)
@@ -592,7 +592,7 @@ static u32 clk_prog_construct_1x_master(struct gk20a *g,
                 g->clk_pmu.clk_progobjs.vf_entry_count;
         u8 railidx;
 
-        gk20a_dbg_info(" type - %x", BOARDOBJ_GET_TYPE(pargs));
+        nvgpu_log_info(g, " type - %x", BOARDOBJ_GET_TYPE(pargs));
 
         ptmpobj->type_mask |= BIT(CTRL_CLK_CLK_PROG_TYPE_1X_MASTER);
         status = clk_prog_construct_1x(g, ppboardobj, size, pargs);
@@ -686,7 +686,7 @@ static u32 clk_prog_construct_1x_master_table(struct gk20a *g,
         u32 slavesize = sizeof(struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) *
                 g->clk_pmu.clk_progobjs.slave_entry_count;
 
-        gk20a_dbg_info("type - %x", BOARDOBJ_GET_TYPE(pargs));
+        nvgpu_log_info(g, "type - %x", BOARDOBJ_GET_TYPE(pargs));
 
         if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_PROG_TYPE_1X_MASTER_TABLE)
                 return -EINVAL;
@@ -727,7 +727,7 @@ static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs)
         struct boardobj *board_obj_ptr = NULL;
         u32 status;
 
-        gk20a_dbg_info(" type - %x", BOARDOBJ_GET_TYPE(pargs));
+        nvgpu_log_info(g, " type - %x", BOARDOBJ_GET_TYPE(pargs));
         switch (BOARDOBJ_GET_TYPE(pargs)) {
         case CTRL_CLK_CLK_PROG_TYPE_1X:
                 status = clk_prog_construct_1x(g, &board_obj_ptr,
@@ -754,7 +754,7 @@ static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs)
                 return NULL;
         }
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return (struct clk_prog *)board_obj_ptr;
 }
@@ -777,7 +777,7 @@ static u32 vfflatten_prog_1x_master(struct gk20a *g,
         u8 vf_point_idx;
         u8 vf_rail_idx;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
         memset(&vf_point_data, 0x0, sizeof(vf_point_data));
 
         vf_point_idx = BOARDOBJGRP_NEXT_EMPTY_IDX(
@@ -851,7 +851,7 @@ static u32 vfflatten_prog_1x_master(struct gk20a *g,
         *pfreqmaxlastmhz = p1xmaster->super.freq_max_mhz;
 
 done:
-        gk20a_dbg_info("done status %x", status);
+        nvgpu_log_info(g, "done status %x", status);
         return status;
 }
 
diff --git a/drivers/gpu/nvgpu/clk/clk_vf_point.c b/drivers/gpu/nvgpu/clk/clk_vf_point.c
index 8333b2b0..b459c012 100644
--- a/drivers/gpu/nvgpu/clk/clk_vf_point.c
+++ b/drivers/gpu/nvgpu/clk/clk_vf_point.c
@@ -59,7 +59,7 @@ static u32 _clk_vf_points_pmudata_instget(struct gk20a *g,
                 (struct nv_pmu_clk_clk_vf_point_boardobj_grp_set *)
                 pmuboardobjgrp;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (idx >= CTRL_BOARDOBJGRP_E255_MAX_OBJECTS)
@@ -67,7 +67,7 @@ static u32 _clk_vf_points_pmudata_instget(struct gk20a *g,
 
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &pgrp_set->objects[idx].data.board_obj;
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
         return 0;
 }
 
@@ -94,7 +94,7 @@ u32 clk_vf_point_sw_setup(struct gk20a *g)
         u32 status;
         struct boardobjgrp *pboardobjgrp = NULL;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = boardobjgrpconstruct_e255(g, &g->clk_pmu.clk_vf_pointobjs.super);
         if (status) {
@@ -132,7 +132,7 @@ u32 clk_vf_point_sw_setup(struct gk20a *g)
         pboardobjgrp->pmustatusinstget  = _clk_vf_points_pmustatus_instget;
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
 
@@ -141,7 +141,7 @@ u32 clk_vf_point_pmu_setup(struct gk20a *g)
         u32 status;
         struct boardobjgrp *pboardobjgrp = NULL;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         pboardobjgrp = &g->clk_pmu.clk_vf_pointobjs.super.super;
 
@@ -150,7 +150,7 @@ u32 clk_vf_point_pmu_setup(struct gk20a *g)
 
         status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
 
-        gk20a_dbg_info("Done");
+        nvgpu_log_info(g, "Done");
         return status;
 }
 
@@ -187,7 +187,7 @@ static u32 _clk_vf_point_pmudatainit_volt(struct gk20a *g,
         struct clk_vf_point_volt *pclk_vf_point_volt;
         struct nv_pmu_clk_clk_vf_point_volt_boardobj_set *pset;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = _clk_vf_point_pmudatainit_super(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -214,7 +214,7 @@ static u32 _clk_vf_point_pmudatainit_freq(struct gk20a *g,
         struct clk_vf_point_freq *pclk_vf_point_freq;
         struct nv_pmu_clk_clk_vf_point_freq_boardobj_set *pset;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = _clk_vf_point_pmudatainit_super(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -297,7 +297,7 @@ struct clk_vf_point *construct_clk_vf_point(struct gk20a *g, void *pargs)
         struct boardobj *board_obj_ptr = NULL;
         u32 status;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
         switch (BOARDOBJ_GET_TYPE(pargs)) {
         case CTRL_CLK_CLK_VF_POINT_TYPE_FREQ:
                 status = clk_vf_point_construct_freq(g, &board_obj_ptr,
@@ -316,7 +316,7 @@ struct clk_vf_point *construct_clk_vf_point(struct gk20a *g, void *pargs)
         if (status)
                 return NULL;
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return (struct clk_vf_point *)board_obj_ptr;
 }
@@ -329,7 +329,7 @@ static u32 _clk_vf_point_pmudatainit_super(struct gk20a *g,
         struct clk_vf_point *pclk_vf_point;
         struct nv_pmu_clk_clk_vf_point_boardobj_set *pset;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -355,7 +355,7 @@ static u32 clk_vf_point_update(struct gk20a *g,
         struct clk_vf_point *pclk_vf_point;
         struct nv_pmu_clk_clk_vf_point_boardobj_get_status *pstatus;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
 
         pclk_vf_point =
@@ -388,7 +388,7 @@ u32 clk_vf_point_cache(struct gk20a *g)
         u32 status;
         u8 index;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
         pclk_vf_points = &g->clk_pmu.clk_vf_pointobjs;
         pboardobjgrp = &pclk_vf_points->super.super;
         pboardobjgrpmask = &pclk_vf_points->super.mask.super;
diff --git a/drivers/gpu/nvgpu/clk/clk_vin.c b/drivers/gpu/nvgpu/clk/clk_vin.c
index 74bcd247..66efefef 100644
--- a/drivers/gpu/nvgpu/clk/clk_vin.c
+++ b/drivers/gpu/nvgpu/clk/clk_vin.c
@@ -323,13 +323,13 @@ static u32 _clk_vin_devgrp_pmudatainit_super(struct gk20a *g,
         struct avfsvinobjs *pvin_obbj = (struct avfsvinobjs *)pboardobjgrp;
         u32 status = 0;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu);
 
         pset->b_vin_is_disable_allowed = pvin_obbj->vin_is_disable_allowed;
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
         return status;
 }
 
@@ -342,7 +342,7 @@ static u32 _clk_vin_devgrp_pmudata_instget(struct gk20a *g,
                 (struct nv_pmu_clk_clk_vin_device_boardobj_grp_set *)
                 pmuboardobjgrp;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         /*check whether pmuboardobjgrp has a valid boardobj in index*/
         if (((u32)BIT(idx) &
@@ -351,7 +351,7 @@ static u32 _clk_vin_devgrp_pmudata_instget(struct gk20a *g,
 
         *ppboardobjpmudata = (struct nv_pmu_boardobj *)
                 &pgrp_set->objects[idx].data.board_obj;
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
         return 0;
 }
 
@@ -381,7 +381,7 @@ u32 clk_vin_sw_setup(struct gk20a *g)
         struct vin_device_v20 *pvindev = NULL;
         struct avfsvinobjs *pvinobjs;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = boardobjgrpconstruct_e32(g, &g->clk_pmu.avfs_vinobjs.super);
         if (status) {
@@ -427,7 +427,7 @@ u32 clk_vin_sw_setup(struct gk20a *g)
         }
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
 
@@ -436,7 +436,7 @@ u32 clk_vin_pmu_setup(struct gk20a *g)
         u32 status;
         struct boardobjgrp *pboardobjgrp = NULL;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         pboardobjgrp = &g->clk_pmu.avfs_vinobjs.super.super;
 
@@ -445,7 +445,7 @@ u32 clk_vin_pmu_setup(struct gk20a *g)
 
         status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
 
-        gk20a_dbg_info("Done");
+        nvgpu_log_info(g, "Done");
         return status;
 }
 
@@ -470,7 +470,7 @@ static u32 devinit_get_vin_device_table(struct gk20a *g,
                 struct vin_device_v20 vin_device_v20;
         } vin_device_data;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         vin_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
                         g->bios.clock_token, VIN_TABLE);
@@ -557,7 +557,7 @@ static u32 devinit_get_vin_device_table(struct gk20a *g,
         }
 
 done:
-        gk20a_dbg_info(" done status %x", status);
+        nvgpu_log_info(g, " done status %x", status);
         return status;
 }
 
@@ -645,7 +645,7 @@ static struct vin_device *construct_vin_device(struct gk20a *g, void *pargs)
         struct boardobj *board_obj_ptr = NULL;
         u32 status;
 
-        gk20a_dbg_info(" %d", BOARDOBJ_GET_TYPE(pargs));
+        nvgpu_log_info(g, " %d", BOARDOBJ_GET_TYPE(pargs));
         switch (BOARDOBJ_GET_TYPE(pargs)) {
         case CTRL_CLK_VIN_TYPE_V10:
                 status = vin_device_construct_v10(g, &board_obj_ptr,
@@ -664,7 +664,7 @@ static struct vin_device *construct_vin_device(struct gk20a *g, void *pargs)
         if (status)
                 return NULL;
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return (struct vin_device *)board_obj_ptr;
 }
@@ -679,7 +679,7 @@ static u32 vin_device_init_pmudata_v10(struct gk20a *g,
         struct vin_device_v20 *pvin_dev_v20;
         struct nv_pmu_clk_clk_vin_device_v10_boardobj_set *perf_pmu_data;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = vin_device_init_pmudata_super(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -692,7 +692,7 @@ static u32 vin_device_init_pmudata_v10(struct gk20a *g,
         perf_pmu_data->data.vin_cal.intercept = pvin_dev_v20->data.vin_cal.cal_v10.intercept;
         perf_pmu_data->data.vin_cal.slope = pvin_dev_v20->data.vin_cal.cal_v10.slope;
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return status;
 }
@@ -705,7 +705,7 @@ static u32 vin_device_init_pmudata_v20(struct gk20a *g,
         struct vin_device_v20 *pvin_dev_v20;
         struct nv_pmu_clk_clk_vin_device_v20_boardobj_set *perf_pmu_data;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = vin_device_init_pmudata_super(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -718,7 +718,7 @@ static u32 vin_device_init_pmudata_v20(struct gk20a *g,
         perf_pmu_data->data.vin_cal.cal_v20.offset = pvin_dev_v20->data.vin_cal.cal_v20.offset;
         perf_pmu_data->data.vin_cal.cal_v20.gain = pvin_dev_v20->data.vin_cal.cal_v20.gain;
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return status;
 }
@@ -731,7 +731,7 @@ static u32 vin_device_init_pmudata_super(struct gk20a *g,
         struct vin_device *pvin_dev;
         struct nv_pmu_clk_clk_vin_device_boardobj_set *perf_pmu_data;
 
-        gk20a_dbg_info("");
+        nvgpu_log_info(g, " ");
 
         status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
         if (status != 0)
@@ -745,7 +745,7 @@ static u32 vin_device_init_pmudata_super(struct gk20a *g,
         perf_pmu_data->volt_domain = pvin_dev->volt_domain;
         perf_pmu_data->flls_shared_mask = pvin_dev->flls_shared_mask;
 
-        gk20a_dbg_info(" Done");
+        nvgpu_log_info(g, " Done");
 
         return status;
 }