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authorDebarshi Dutta <ddutta@nvidia.com>2017-08-18 06:52:29 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-22 06:53:51 -0400
commit81868a187fa3b217368206f17b19309846e8e7fb (patch)
tree2b59e33b61cc6e206f7781f3b4ab44c5c7b6d721 /drivers/gpu/nvgpu/clk
parent5f010177de985c901c33c914efe70a8498a5974f (diff)
gpu: nvgpu: Nvgpu abstraction for linux barriers.
construct wrapper nvgpu_* methods to replace mb,rmb,wmb,smp_mb,smp_rmb,smp_wmb,read_barrier_depends and smp_read_barrier_depends. NVGPU-122 Change-Id: I8d24dd70fef5cb0fadaacc15f3ab11531667a0df Signed-off-by: Debarshi <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1541199 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Sourab Gupta <sourabg@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/clk')
-rw-r--r--drivers/gpu/nvgpu/clk/clk_arb.c43
1 files changed, 22 insertions, 21 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk_arb.c b/drivers/gpu/nvgpu/clk/clk_arb.c
index b00ecd31..f1de54c6 100644
--- a/drivers/gpu/nvgpu/clk/clk_arb.c
+++ b/drivers/gpu/nvgpu/clk/clk_arb.c
@@ -27,6 +27,7 @@
27#include <nvgpu/bug.h> 27#include <nvgpu/bug.h>
28#include <nvgpu/kref.h> 28#include <nvgpu/kref.h>
29#include <nvgpu/log.h> 29#include <nvgpu/log.h>
30#include <nvgpu/barrier.h>
30 31
31#include "gk20a/gk20a.h" 32#include "gk20a/gk20a.h"
32#include "clk/clk_arb.h" 33#include "clk/clk_arb.h"
@@ -386,7 +387,7 @@ int nvgpu_clk_arb_init_arbiter(struct gk20a *g)
386 goto init_fail; 387 goto init_fail;
387 do { 388 do {
388 /* Check that first run is completed */ 389 /* Check that first run is completed */
389 smp_mb(); 390 nvgpu_smp_mb();
390 wait_event_interruptible(arb->request_wq, 391 wait_event_interruptible(arb->request_wq,
391 nvgpu_atomic_read(&arb->req_nr)); 392 nvgpu_atomic_read(&arb->req_nr));
392 } while (!nvgpu_atomic_read(&arb->req_nr)); 393 } while (!nvgpu_atomic_read(&arb->req_nr));
@@ -578,7 +579,7 @@ int nvgpu_clk_arb_init_session(struct gk20a *g,
578 session->target_pool[0].pstate = CTRL_PERF_PSTATE_P8; 579 session->target_pool[0].pstate = CTRL_PERF_PSTATE_P8;
579 /* make sure that the initialization of the pool is visible 580 /* make sure that the initialization of the pool is visible
580 * before the update */ 581 * before the update */
581 smp_wmb(); 582 nvgpu_smp_wmb();
582 session->target = &session->target_pool[0]; 583 session->target = &session->target_pool[0];
583 584
584 init_llist_head(&session->targets); 585 init_llist_head(&session->targets);
@@ -706,7 +707,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb)
706 707
707 table = ACCESS_ONCE(arb->current_vf_table); 708 table = ACCESS_ONCE(arb->current_vf_table);
708 /* make flag visible when all data has resolved in the tables */ 709 /* make flag visible when all data has resolved in the tables */
709 smp_rmb(); 710 nvgpu_smp_rmb();
710 711
711 table = (table == &arb->vf_table_pool[0]) ? &arb->vf_table_pool[1] : 712 table = (table == &arb->vf_table_pool[0]) ? &arb->vf_table_pool[1] :
712 &arb->vf_table_pool[0]; 713 &arb->vf_table_pool[0];
@@ -980,7 +981,7 @@ static int nvgpu_clk_arb_update_vf_table(struct nvgpu_clk_arb *arb)
980 } 981 }
981 982
982 /* make table visible when all data has resolved in the tables */ 983 /* make table visible when all data has resolved in the tables */
983 smp_wmb(); 984 nvgpu_smp_wmb();
984 xchg(&arb->current_vf_table, table); 985 xchg(&arb->current_vf_table, table);
985 986
986exit_vf_table: 987exit_vf_table:
@@ -1077,7 +1078,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
1077 &session->target_pool[1] : 1078 &session->target_pool[1] :
1078 &session->target_pool[0]; 1079 &session->target_pool[0];
1079 /* Do not reorder pointer */ 1080 /* Do not reorder pointer */
1080 smp_rmb(); 1081 nvgpu_smp_rmb();
1081 head = llist_del_all(&session->targets); 1082 head = llist_del_all(&session->targets);
1082 if (head) { 1083 if (head) {
1083 1084
@@ -1102,7 +1103,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
1102 llist_add(&dev->node, &arb->requests); 1103 llist_add(&dev->node, &arb->requests);
1103 } 1104 }
1104 /* Ensure target is updated before ptr sawp */ 1105 /* Ensure target is updated before ptr sawp */
1105 smp_wmb(); 1106 nvgpu_smp_wmb();
1106 xchg(&session->target, target); 1107 xchg(&session->target, target);
1107 } 1108 }
1108 1109
@@ -1148,7 +1149,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
1148 if (pstate == VF_POINT_INVALID_PSTATE) { 1149 if (pstate == VF_POINT_INVALID_PSTATE) {
1149 arb->status = -EINVAL; 1150 arb->status = -EINVAL;
1150 /* make status visible */ 1151 /* make status visible */
1151 smp_mb(); 1152 nvgpu_smp_mb();
1152 goto exit_arb; 1153 goto exit_arb;
1153 } 1154 }
1154 1155
@@ -1175,7 +1176,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
1175 nvgpu_mutex_release(&arb->pstate_lock); 1176 nvgpu_mutex_release(&arb->pstate_lock);
1176 1177
1177 /* make status visible */ 1178 /* make status visible */
1178 smp_mb(); 1179 nvgpu_smp_mb();
1179 goto exit_arb; 1180 goto exit_arb;
1180 } 1181 }
1181 status = volt_set_noiseaware_vmin(g, nuvmin, nuvmin_sram); 1182 status = volt_set_noiseaware_vmin(g, nuvmin, nuvmin_sram);
@@ -1184,7 +1185,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
1184 nvgpu_mutex_release(&arb->pstate_lock); 1185 nvgpu_mutex_release(&arb->pstate_lock);
1185 1186
1186 /* make status visible */ 1187 /* make status visible */
1187 smp_mb(); 1188 nvgpu_smp_mb();
1188 goto exit_arb; 1189 goto exit_arb;
1189 } 1190 }
1190 1191
@@ -1196,7 +1197,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
1196 nvgpu_mutex_release(&arb->pstate_lock); 1197 nvgpu_mutex_release(&arb->pstate_lock);
1197 1198
1198 /* make status visible */ 1199 /* make status visible */
1199 smp_mb(); 1200 nvgpu_smp_mb();
1200 goto exit_arb; 1201 goto exit_arb;
1201 } 1202 }
1202 1203
@@ -1206,7 +1207,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
1206 nvgpu_mutex_release(&arb->pstate_lock); 1207 nvgpu_mutex_release(&arb->pstate_lock);
1207 1208
1208 /* make status visible */ 1209 /* make status visible */
1209 smp_mb(); 1210 nvgpu_smp_mb();
1210 goto exit_arb; 1211 goto exit_arb;
1211 } 1212 }
1212 1213
@@ -1216,7 +1217,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
1216 nvgpu_mutex_release(&arb->pstate_lock); 1217 nvgpu_mutex_release(&arb->pstate_lock);
1217 1218
1218 /* make status visible */ 1219 /* make status visible */
1219 smp_mb(); 1220 nvgpu_smp_mb();
1220 goto exit_arb; 1221 goto exit_arb;
1221 } 1222 }
1222 1223
@@ -1224,7 +1225,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
1224 &arb->actual_pool[1] : &arb->actual_pool[0]; 1225 &arb->actual_pool[1] : &arb->actual_pool[0];
1225 1226
1226 /* do not reorder this pointer */ 1227 /* do not reorder this pointer */
1227 smp_rmb(); 1228 nvgpu_smp_rmb();
1228 actual->gpc2clk = gpc2clk_target; 1229 actual->gpc2clk = gpc2clk_target;
1229 actual->mclk = mclk_target; 1230 actual->mclk = mclk_target;
1230 arb->voltuv_actual = voltuv; 1231 arb->voltuv_actual = voltuv;
@@ -1232,7 +1233,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
1232 arb->status = status; 1233 arb->status = status;
1233 1234
1234 /* Make changes visible to other threads */ 1235 /* Make changes visible to other threads */
1235 smp_wmb(); 1236 nvgpu_smp_wmb();
1236 xchg(&arb->actual, actual); 1237 xchg(&arb->actual, actual);
1237 1238
1238 status = nvgpu_lpwr_enable_pg(g, false); 1239 status = nvgpu_lpwr_enable_pg(g, false);
@@ -1241,12 +1242,12 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
1241 nvgpu_mutex_release(&arb->pstate_lock); 1242 nvgpu_mutex_release(&arb->pstate_lock);
1242 1243
1243 /* make status visible */ 1244 /* make status visible */
1244 smp_mb(); 1245 nvgpu_smp_mb();
1245 goto exit_arb; 1246 goto exit_arb;
1246 } 1247 }
1247 1248
1248 /* status must be visible before atomic inc */ 1249 /* status must be visible before atomic inc */
1249 smp_wmb(); 1250 nvgpu_smp_wmb();
1250 nvgpu_atomic_inc(&arb->req_nr); 1251 nvgpu_atomic_inc(&arb->req_nr);
1251 1252
1252 /* Unlock pstate change for PG */ 1253 /* Unlock pstate change for PG */
@@ -1287,7 +1288,7 @@ static void nvgpu_clk_arb_run_arbiter_cb(struct work_struct *work)
1287 (curr - debug->switch_avg) * (curr - prev_avg); 1288 (curr - debug->switch_avg) * (curr - prev_avg);
1288 } 1289 }
1289 /* commit changes before exchanging debug pointer */ 1290 /* commit changes before exchanging debug pointer */
1290 smp_wmb(); 1291 nvgpu_smp_wmb();
1291 xchg(&arb->debug, debug); 1292 xchg(&arb->debug, debug);
1292#endif 1293#endif
1293 1294
@@ -1687,7 +1688,7 @@ int nvgpu_clk_arb_get_session_target_mhz(struct nvgpu_clk_session *session,
1687 do { 1688 do {
1688 target = ACCESS_ONCE(session->target); 1689 target = ACCESS_ONCE(session->target);
1689 /* no reordering of this pointer */ 1690 /* no reordering of this pointer */
1690 smp_rmb(); 1691 nvgpu_smp_rmb();
1691 1692
1692 switch (api_domain) { 1693 switch (api_domain) {
1693 case NVGPU_GPU_CLK_DOMAIN_MCLK: 1694 case NVGPU_GPU_CLK_DOMAIN_MCLK:
@@ -1716,7 +1717,7 @@ int nvgpu_clk_arb_get_arbiter_actual_mhz(struct gk20a *g,
1716 do { 1717 do {
1717 actual = ACCESS_ONCE(arb->actual); 1718 actual = ACCESS_ONCE(arb->actual);
1718 /* no reordering of this pointer */ 1719 /* no reordering of this pointer */
1719 smp_rmb(); 1720 nvgpu_smp_rmb();
1720 1721
1721 switch (api_domain) { 1722 switch (api_domain) {
1722 case NVGPU_GPU_CLK_DOMAIN_MCLK: 1723 case NVGPU_GPU_CLK_DOMAIN_MCLK:
@@ -1854,7 +1855,7 @@ static u8 nvgpu_clk_arb_find_vf_point(struct nvgpu_clk_arb *arb,
1854 1855
1855 table = ACCESS_ONCE(arb->current_vf_table); 1856 table = ACCESS_ONCE(arb->current_vf_table);
1856 /* pointer to table can be updated by callback */ 1857 /* pointer to table can be updated by callback */
1857 smp_rmb(); 1858 nvgpu_smp_rmb();
1858 1859
1859 if (!table) 1860 if (!table)
1860 continue; 1861 continue;
@@ -2039,7 +2040,7 @@ static int nvgpu_clk_arb_stats_show(struct seq_file *s, void *unused)
2039 2040
2040 debug = ACCESS_ONCE(arb->debug); 2041 debug = ACCESS_ONCE(arb->debug);
2041 /* Make copy of structure and ensure no reordering */ 2042 /* Make copy of structure and ensure no reordering */
2042 smp_rmb(); 2043 nvgpu_smp_rmb();
2043 if (!debug) 2044 if (!debug)
2044 return -EINVAL; 2045 return -EINVAL;
2045 2046