diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-11-14 13:54:12 -0500 |
---|---|---|
committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:51 -0500 |
commit | 0bef6c98974be712381a95f7fca143b2679a6ea4 (patch) | |
tree | 16d681aa7297fc8db35ca32679007f04096e0106 /drivers/gpu/nvgpu/clk | |
parent | 90fbd43cbeb1439dd633f28f9a28b0f4e1cba1a3 (diff) |
gpu: nvgpu: gp106: Expose the boot max freq
Expose the currently hard coded boot frequency, which is at the same
time the max frequency. We use it for filling in GPU characteristics.
Bug 200251486
Change-Id: I3c0abb7a385a83f61b93ddfa857b982c850853e3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1252906
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Tested-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/clk')
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk.h | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk.c b/drivers/gpu/nvgpu/clk/clk.c index 5aafa701..ef0834f4 100644 --- a/drivers/gpu/nvgpu/clk/clk.c +++ b/drivers/gpu/nvgpu/clk/clk.c | |||
@@ -20,7 +20,6 @@ | |||
20 | #include "volt/volt.h" | 20 | #include "volt/volt.h" |
21 | #include "gk20a/pmu_gk20a.h" | 21 | #include "gk20a/pmu_gk20a.h" |
22 | 22 | ||
23 | #define BOOT_GPC2CLK_MHZ 2581 | ||
24 | #define BOOT_MCLK_MHZ 3003 | 23 | #define BOOT_MCLK_MHZ 3003 |
25 | 24 | ||
26 | struct clkrpc_pmucmdhandler_params { | 25 | struct clkrpc_pmucmdhandler_params { |
diff --git a/drivers/gpu/nvgpu/clk/clk.h b/drivers/gpu/nvgpu/clk/clk.h index 2d6425b5..a0b88dcb 100644 --- a/drivers/gpu/nvgpu/clk/clk.h +++ b/drivers/gpu/nvgpu/clk/clk.h | |||
@@ -102,6 +102,8 @@ struct vbios_clocks_table_1x_hal_clock_entry { | |||
102 | #define PERF_CLK_PCIEGENCLK 12 | 102 | #define PERF_CLK_PCIEGENCLK 12 |
103 | #define PERF_CLK_NUM 13 | 103 | #define PERF_CLK_NUM 13 |
104 | 104 | ||
105 | #define BOOT_GPC2CLK_MHZ 2581 | ||
106 | |||
105 | u32 clk_pmu_vin_load(struct gk20a *g); | 107 | u32 clk_pmu_vin_load(struct gk20a *g); |
106 | u32 clk_domain_print_vf_table(struct gk20a *g, u32 clkapidomain); | 108 | u32 clk_domain_print_vf_table(struct gk20a *g, u32 clkapidomain); |
107 | u32 clk_domain_get_f_or_v( | 109 | u32 clk_domain_get_f_or_v( |