gpu: nvgpu: support to parse VF table

JIRA DNVGPU-123

function was added to retrieve V for F or
F for V for a given clock domain.
Clock domain can be master or slave.
F or V can be intermediate point between two
successive V or F values in VF table.
VF table should be cached before calling this function.
A F value below Fmin will return Vmin.
F > Fmax will return error
A V value above Vmax wil return F max.
A V value below Vmin will return error.

Change-Id: I28b4e8647510c6933e9e1204cfff31d74616e11a
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1211234
(cherry-picked from commit 5b83b03f2454fbec8d49a064ed09b09c92d3e9fa)
Reviewed-on: http://git-master/r/1235054
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/clk/clk_prog.h b/drivers/gpu/nvgpu/clk/clk_prog.h
index 8718bdd6..979d327d 100644
--- a/drivers/gpu/nvgpu/clk/clk_prog.h
+++ b/drivers/gpu/nvgpu/clk/clk_prog.h
@@ -27,6 +27,11 @@ typedef u32 vf_flatten(struct gk20a *g, struct clk_pmupstate *pclk,
                         struct clk_prog_1x_master *p1xmaster,
                         u8 clk_domain_idx, u16 *pfreqmaxlastmhz);
 
+typedef u32 vf_lookup(struct gk20a *g, struct clk_pmupstate *pclk,
+                        struct clk_prog_1x_master *p1xmaster,
+                        u8 *slave_clk_domain_idx, u16 *pclkmhz,
+                        u32 *pvoltuv, u8 rail);
+
 struct clk_progs {
         struct boardobjgrp_e255 super;
         u8 slave_entry_count;
@@ -52,6 +57,7 @@ struct clk_prog_1x_master {
         struct ctrl_clk_clk_delta deltas;
         union ctrl_clk_clk_prog_1x_master_source_data source_data;
         vf_flatten *vfflatten;
+        vf_lookup *vflookup;
 };
 
 struct clk_prog_1x_master_ratio {