summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/clk/clk_prog.c
diff options
context:
space:
mode:
authorMahantesh Kumbar <mkumbar@nvidia.com>2016-09-01 05:47:34 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:56:49 -0500
commit2d3ba5478d0d9a12b123a0261653d33eb37e6e87 (patch)
tree63bc1a1568914edffe31dabf5d05e6ac10c42970 /drivers/gpu/nvgpu/clk/clk_prog.c
parent5159f6bf43dc4822f6f05a957f0cf090ff3e1db7 (diff)
gpu: nvgpu: Clocks params update
- Clocks params update as per r370 JIRA DNVGPU-116 Change-Id: I0aaa1e275aaa2027f2839f3fe24c9aee3e14fd8d Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1212827 (cherry picked from commit 54df6ad9668d46dffb5b9d03265948a47611ff13) Reviewed-on: http://git-master/r/1227288 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/clk/clk_prog.c')
-rw-r--r--drivers/gpu/nvgpu/clk/clk_prog.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk_prog.c b/drivers/gpu/nvgpu/clk/clk_prog.c
index d87581c4..4bf473ac 100644
--- a/drivers/gpu/nvgpu/clk/clk_prog.c
+++ b/drivers/gpu/nvgpu/clk/clk_prog.c
@@ -433,6 +433,7 @@ static u32 _clk_prog_pmudatainit_1x_master(struct gk20a *g,
433 memcpy(pset->vf_entries, pclk_prog_1x_master->p_vf_entries, vfsize); 433 memcpy(pset->vf_entries, pclk_prog_1x_master->p_vf_entries, vfsize);
434 434
435 pset->b_o_c_o_v_enabled = pclk_prog_1x_master->b_o_c_o_v_enabled; 435 pset->b_o_c_o_v_enabled = pclk_prog_1x_master->b_o_c_o_v_enabled;
436 pset->source_data = pclk_prog_1x_master->source_data;
436 437
437 memcpy(&pset->deltas, &pclk_prog_1x_master->deltas, 438 memcpy(&pset->deltas, &pclk_prog_1x_master->deltas,
438 (u32) sizeof(struct ctrl_clk_clk_delta)); 439 (u32) sizeof(struct ctrl_clk_clk_delta));
@@ -810,11 +811,9 @@ static u32 vfflatten_prog_1x_master(struct gk20a *g,
810 /* FLL sources use a voltage-based VF_POINT.*/ 811 /* FLL sources use a voltage-based VF_POINT.*/
811 vf_point_data.board_obj.type = 812 vf_point_data.board_obj.type =
812 CTRL_CLK_CLK_VF_POINT_TYPE_VOLT; 813 CTRL_CLK_CLK_VF_POINT_TYPE_VOLT;
813 vf_point_data.volt.clk_domain_idx = clk_domain_idx;
814 for (i = 0; i < step_count; i++) { 814 for (i = 0; i < step_count; i++) {
815 vf_point_data.volt.source_voltage_uv = 815 vf_point_data.volt.source_voltage_uv =
816 voltage_min_uv + i * voltage_step_size_uv; 816 voltage_min_uv + i * voltage_step_size_uv;
817 vf_point_data.volt.vf_gain_vfe_equ_idx = p_vf_rail->gain_vfe_idx;
818 817
819 status = _clk_prog_1x_master_rail_construct_vf_point(g, pclk, 818 status = _clk_prog_1x_master_rail_construct_vf_point(g, pclk,
820 p1xmaster, p_vf_rail, 819 p1xmaster, p_vf_rail,