nvgpu: gpu: Use pstates for MCLK range

JIRA DNVGPU-168

Change-Id: I7ac05dca745b22b411fc0aa797969b97536dd2e6
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1239466
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1267121
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 6 insertions, 7 deletions

diff --git a/drivers/gpu/nvgpu/clk/clk_mclk.h b/drivers/gpu/nvgpu/clk/clk_mclk.h
index e3e6c1ee..cb7f0de0 100644
--- a/drivers/gpu/nvgpu/clk/clk_mclk.h
+++ b/drivers/gpu/nvgpu/clk/clk_mclk.h
@@ -22,15 +22,14 @@ enum gk20a_mclk_speed {
         gk20a_mclk_high_speed,
 };
 
-#define MCLK_LOW_SPEED_LIMIT 405
-#define MCLK_MID_SPEED_LIMIT 810
-#define MCLK_HIGH_SPEED_LIMIT 3003
-
-#define DEFAULT_BOOT_MCLK_SPEED MCLK_HIGH_SPEED_LIMIT
-
 struct clk_mclk_state {
         enum gk20a_mclk_speed speed;
-        struct mutex mclk_mutex;
+        struct mutex mclk_lock;
+        struct mutex data_lock;
+
+        u16 p5_min;
+        u16 p0_min;
+
         void *vreg_buf;
         bool init;