nvgpu: gpu: arbiter for vf switch management

JIRA DNVGPU-143

The arbiter is charged with selecting the proper
frequencies when multiple applications submit
simultaneously clock change requests

On the current implementation, the arbiter guarantees
that the selected frequency will be always higher
or equal to the request, as long as the request is
in range.

The current code is not yet realtime friendly, as
requests are not pre-allocated.

Summary of changes:
(1) pstate/vf switch no longer selects boot frequency
(2) changed mclk code change to accept input freq
(3) added arbiter
(4) now a single session can submit concurrent requests
the last request is the one that applies for that
session
(5) modified locking mechanism to reduce lock contention
(6) Added callback to notify the arbiter that the VF
table has changed and is no longer valid (PMU/Thermals
must call this when VF table is invalid)
(7) changed internal API to work with MHz
(8) added debugfs for stats

Change-Id: I6a7b05c9447761e8536f84ef86b5ab0793164d63
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1239461
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1267120
Reviewed-by: Automatic_Commit_Validation_User

1 files changed, 10 insertions, 9 deletions

diff --git a/drivers/gpu/nvgpu/clk/clk_mclk.c b/drivers/gpu/nvgpu/clk/clk_mclk.c
index 86f4ff6d..6ad6c054 100644
--- a/drivers/gpu/nvgpu/clk/clk_mclk.c
+++ b/drivers/gpu/nvgpu/clk/clk_mclk.c
@@ -2222,7 +2222,7 @@ int clk_mclkseq_init_mclk_gddr5(struct gk20a *g)
         return 0;
 }
 
-int clk_mclkseq_change_mclk_gddr5(struct gk20a *g, enum gk20a_mclk_speed speed)
+int clk_mclkseq_change_mclk_gddr5(struct gk20a *g, u16 val)
 {
         struct clk_mclk_state *mclk;
         struct pmu_payload payload = { {0} };
@@ -2236,6 +2236,7 @@ int clk_mclkseq_change_mclk_gddr5(struct gk20a *g, enum gk20a_mclk_speed speed)
 #ifdef CONFIG_DEBUG_FS
         u64 t0, t1;
 #endif
+        enum gk20a_mclk_speed speed;
 
         gk20a_dbg_info("");
 
@@ -2246,6 +2247,13 @@ int clk_mclkseq_change_mclk_gddr5(struct gk20a *g, enum gk20a_mclk_speed speed)
         if (!mclk->init)
                 goto exit_status;
 
+        /* TODO thia should be done according to VBIOS tables */
+
+        speed = (val <= MCLK_LOW_SPEED_LIMIT) ? gk20a_mclk_low_speed :
+                (val <= MCLK_MID_SPEED_LIMIT) ? gk20a_mclk_mid_speed :
+                                                gk20a_mclk_high_speed;
+
+
         if (speed == mclk->speed)
                 goto exit_status;
 
@@ -2374,20 +2382,13 @@ exit_status:
 #ifdef CONFIG_DEBUG_FS
 static int mclk_debug_speed_set(void *data, u64 val)
 {
-        enum gk20a_mclk_speed speed;
         struct gk20a *g = (struct gk20a *) data;
         struct clk_mclk_state *mclk;
 
         mclk = &g->clk_pmu.clk_mclk;
 
-        /* TODO thia should be done according to VBIOS tables */
-
-        speed = (val <= MCLK_LOW_SPEED_LIMIT) ? gk20a_mclk_low_speed :
-                (val <= MCLK_MID_SPEED_LIMIT) ? gk20a_mclk_mid_speed :
-                                                gk20a_mclk_high_speed;
-
         if (mclk->change)
-                return mclk->change(g, speed);
+                return mclk->change(g, (u16) val);
         return 0;
 
 }