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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-02-09 11:17:47 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-02-17 16:46:32 -0500
commit53465def649b813987ca0d4a7ced744305204b82 (patch)
treecdff16681cb0442de3b1a8bd151b2a38c0bc5311 /drivers/gpu/nvgpu/clk/clk_mclk.c
parent29a79e6b80c6a0da489d8b0a470c86e2fec9c355 (diff)
gpu: nvgpu: Generalize BIOS code
Most of BIOS parsing code is not specific to any particular GPU. Move most of the code to generic files, and leave only chip specific parts dealing with microcontroller boot into chip specific files. As most of the parsing is generic, they do not need to be called via HALs so remove the HALs and change the calls into direct function calls. All definitions meant to be used outside BIOS code itself are now in <nvgpu/bios.h> Change-Id: Id48e94c74511d6e95645e90e5bba5c12ef8da45d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1302222 GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/clk/clk_mclk.c')
-rw-r--r--drivers/gpu/nvgpu/clk/clk_mclk.c21
1 files changed, 7 insertions, 14 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk_mclk.c b/drivers/gpu/nvgpu/clk/clk_mclk.c
index 479fbb0e..815f55ba 100644
--- a/drivers/gpu/nvgpu/clk/clk_mclk.c
+++ b/drivers/gpu/nvgpu/clk/clk_mclk.c
@@ -13,12 +13,10 @@
13 13
14#include <linux/delay.h> 14#include <linux/delay.h>
15 15
16#include <nvgpu/bios.h>
17
16#include "gk20a/gk20a.h" 18#include "gk20a/gk20a.h"
17#include "gk20a/pmu_gk20a.h" 19#include "gk20a/pmu_gk20a.h"
18#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
19#include "gm206/bios_gm206.h"
20
21#include "include/bios.h"
22 20
23#include <nvgpu/hw/gk20a/hw_pwr_gk20a.h> 21#include <nvgpu/hw/gk20a/hw_pwr_gk20a.h>
24#include <nvgpu/hw/gp106/hw_fb_gp106.h> 22#include <nvgpu/hw/gp106/hw_fb_gp106.h>
@@ -2022,12 +2020,7 @@ static int mclk_get_memclk_table(struct gk20a *g)
2022 2020
2023 gk20a_dbg_info(""); 2021 gk20a_dbg_info("");
2024 2022
2025 if (!(g->ops.bios.get_perf_table_ptrs && 2023 mem_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
2026 g->ops.bios.execute_script)) {
2027 goto done;
2028 }
2029
2030 mem_table_ptr = (u8 *)g->ops.bios.get_perf_table_ptrs(g,
2031 g->bios.perf_token, 2024 g->bios.perf_token,
2032 MEMORY_CLOCK_TABLE); 2025 MEMORY_CLOCK_TABLE);
2033 if (mem_table_ptr == NULL) { 2026 if (mem_table_ptr == NULL) {
@@ -2067,7 +2060,7 @@ static int mclk_get_memclk_table(struct gk20a *g)
2067 script_index = BIOS_GET_FIELD(memclock_base_entry.flags1, 2060 script_index = BIOS_GET_FIELD(memclock_base_entry.flags1,
2068 VBIOS_MEMORY_CLOCK_BASE_ENTRY_11_FLAGS1_SCRIPT_INDEX); 2061 VBIOS_MEMORY_CLOCK_BASE_ENTRY_11_FLAGS1_SCRIPT_INDEX);
2069 2062
2070 script_ptr = gm206_bios_read_u32(g, 2063 script_ptr = nvgpu_bios_read_u32(g,
2071 memclock_table_header.script_list_ptr + 2064 memclock_table_header.script_list_ptr +
2072 script_index * sizeof(u32)); 2065 script_index * sizeof(u32));
2073 2066
@@ -2107,7 +2100,7 @@ static int mclk_get_memclk_table(struct gk20a *g)
2107 fb_fbpa_fbio_delay_priv_m(), 2100 fb_fbpa_fbio_delay_priv_m(),
2108 fb_fbpa_fbio_delay_priv_f(shadow_idx))); 2101 fb_fbpa_fbio_delay_priv_f(shadow_idx)));
2109 2102
2110 status = g->ops.bios.execute_script(g, script_ptr); 2103 status = nvgpu_bios_execute_script(g, script_ptr);
2111 if (status < 0) { 2104 if (status < 0) {
2112 gk20a_writel(g, fb_fbpa_fbio_delay_r(), 2105 gk20a_writel(g, fb_fbpa_fbio_delay_r(),
2113 old_fbio_delay); 2106 old_fbio_delay);
@@ -2121,7 +2114,7 @@ static int mclk_get_memclk_table(struct gk20a *g)
2121 cmd_script_index = BIOS_GET_FIELD(memclock_base_entry.flags2, 2114 cmd_script_index = BIOS_GET_FIELD(memclock_base_entry.flags2,
2122 VBIOS_MEMORY_CLOCK_BASE_ENTRY_12_FLAGS2_CMD_SCRIPT_INDEX); 2115 VBIOS_MEMORY_CLOCK_BASE_ENTRY_12_FLAGS2_CMD_SCRIPT_INDEX);
2123 2116
2124 cmd_script_ptr = gm206_bios_read_u32(g, 2117 cmd_script_ptr = nvgpu_bios_read_u32(g,
2125 memclock_table_header.cmd_script_list_ptr + 2118 memclock_table_header.cmd_script_list_ptr +
2126 cmd_script_index * sizeof(u32)); 2119 cmd_script_index * sizeof(u32));
2127 2120
@@ -2159,7 +2152,7 @@ static int mclk_get_memclk_table(struct gk20a *g)
2159 fb_fbpa_fbio_cmd_delay_cmd_priv_f( 2152 fb_fbpa_fbio_cmd_delay_cmd_priv_f(
2160 cmd_idx))); 2153 cmd_idx)));
2161 2154
2162 status = g->ops.bios.execute_script(g, cmd_script_ptr); 2155 status = nvgpu_bios_execute_script(g, cmd_script_ptr);
2163 if (status < 0) { 2156 if (status < 0) {
2164 gk20a_writel(g, fb_fbpa_fbio_cmd_delay_r(), 2157 gk20a_writel(g, fb_fbpa_fbio_cmd_delay_r(),
2165 old_fbio_cmd_delay); 2158 old_fbio_cmd_delay);