diff options
author | Philip Elcan <pelcan@nvidia.com> | 2018-08-29 15:46:12 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-07 00:33:50 -0400 |
commit | 7f8226887c28267d3c2351692d4429ead1e17695 (patch) | |
tree | aa09c45e496b058044c9d9a94c94d9922c572285 /drivers/gpu/nvgpu/clk/clk_freq_controller.c | |
parent | 0e58ebaae13dd59b6aba5297f898e7c89fcd2742 (diff) |
gpu: nvgpu: cleanup return types for MISRA 10.3
This is a big cleanup of return types across a number of modules in the
nvgpu driver. Many functions were returning u32 but using negative
return codes. This is a MISRA 10.3 violation by assigning signed values
to a u32.
JIRA NVGPU-647
Change-Id: I59ee66706321f5b5b1a07ed8c24b81583e9ba28c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1810743
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/clk/clk_freq_controller.c')
-rw-r--r-- | drivers/gpu/nvgpu/clk/clk_freq_controller.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/drivers/gpu/nvgpu/clk/clk_freq_controller.c b/drivers/gpu/nvgpu/clk/clk_freq_controller.c index aa2a3a54..f114f5d5 100644 --- a/drivers/gpu/nvgpu/clk/clk_freq_controller.c +++ b/drivers/gpu/nvgpu/clk/clk_freq_controller.c | |||
@@ -32,13 +32,13 @@ | |||
32 | #include "ctrl/ctrlclk.h" | 32 | #include "ctrl/ctrlclk.h" |
33 | #include "ctrl/ctrlvolt.h" | 33 | #include "ctrl/ctrlvolt.h" |
34 | 34 | ||
35 | static u32 clk_freq_controller_pmudatainit_super(struct gk20a *g, | 35 | static int clk_freq_controller_pmudatainit_super(struct gk20a *g, |
36 | struct boardobj *board_obj_ptr, | 36 | struct boardobj *board_obj_ptr, |
37 | struct nv_pmu_boardobj *ppmudata) | 37 | struct nv_pmu_boardobj *ppmudata) |
38 | { | 38 | { |
39 | struct nv_pmu_clk_clk_freq_controller_boardobj_set *pfreq_cntlr_set; | 39 | struct nv_pmu_clk_clk_freq_controller_boardobj_set *pfreq_cntlr_set; |
40 | struct clk_freq_controller *pfreq_cntlr; | 40 | struct clk_freq_controller *pfreq_cntlr; |
41 | u32 status = 0; | 41 | int status = 0; |
42 | 42 | ||
43 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); | 43 | status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata); |
44 | if (status) { | 44 | if (status) { |
@@ -63,14 +63,14 @@ static u32 clk_freq_controller_pmudatainit_super(struct gk20a *g, | |||
63 | return status; | 63 | return status; |
64 | } | 64 | } |
65 | 65 | ||
66 | static u32 clk_freq_controller_pmudatainit_pi(struct gk20a *g, | 66 | static int clk_freq_controller_pmudatainit_pi(struct gk20a *g, |
67 | struct boardobj *board_obj_ptr, | 67 | struct boardobj *board_obj_ptr, |
68 | struct nv_pmu_boardobj *ppmudata) | 68 | struct nv_pmu_boardobj *ppmudata) |
69 | { | 69 | { |
70 | struct nv_pmu_clk_clk_freq_controller_pi_boardobj_set | 70 | struct nv_pmu_clk_clk_freq_controller_pi_boardobj_set |
71 | *pfreq_cntlr_pi_set; | 71 | *pfreq_cntlr_pi_set; |
72 | struct clk_freq_controller_pi *pfreq_cntlr_pi; | 72 | struct clk_freq_controller_pi *pfreq_cntlr_pi; |
73 | u32 status = 0; | 73 | int status = 0; |
74 | 74 | ||
75 | status = clk_freq_controller_pmudatainit_super(g, | 75 | status = clk_freq_controller_pmudatainit_super(g, |
76 | board_obj_ptr, ppmudata); | 76 | board_obj_ptr, ppmudata); |
@@ -94,13 +94,13 @@ static u32 clk_freq_controller_pmudatainit_pi(struct gk20a *g, | |||
94 | return status; | 94 | return status; |
95 | } | 95 | } |
96 | 96 | ||
97 | static u32 clk_freq_controller_construct_super(struct gk20a *g, | 97 | static int clk_freq_controller_construct_super(struct gk20a *g, |
98 | struct boardobj **ppboardobj, | 98 | struct boardobj **ppboardobj, |
99 | u16 size, void *pargs) | 99 | u16 size, void *pargs) |
100 | { | 100 | { |
101 | struct clk_freq_controller *pfreq_cntlr = NULL; | 101 | struct clk_freq_controller *pfreq_cntlr = NULL; |
102 | struct clk_freq_controller *pfreq_cntlr_tmp = NULL; | 102 | struct clk_freq_controller *pfreq_cntlr_tmp = NULL; |
103 | u32 status = 0; | 103 | int status = 0; |
104 | 104 | ||
105 | status = boardobj_construct_super(g, ppboardobj, size, pargs); | 105 | status = boardobj_construct_super(g, ppboardobj, size, pargs); |
106 | if (status) { | 106 | if (status) { |
@@ -125,13 +125,13 @@ static u32 clk_freq_controller_construct_super(struct gk20a *g, | |||
125 | return status; | 125 | return status; |
126 | } | 126 | } |
127 | 127 | ||
128 | static u32 clk_freq_controller_construct_pi(struct gk20a *g, | 128 | static int clk_freq_controller_construct_pi(struct gk20a *g, |
129 | struct boardobj **ppboardobj, | 129 | struct boardobj **ppboardobj, |
130 | u16 size, void *pargs) | 130 | u16 size, void *pargs) |
131 | { | 131 | { |
132 | struct clk_freq_controller_pi *pfreq_cntlr_pi = NULL; | 132 | struct clk_freq_controller_pi *pfreq_cntlr_pi = NULL; |
133 | struct clk_freq_controller_pi *pfreq_cntlr_pi_tmp = NULL; | 133 | struct clk_freq_controller_pi *pfreq_cntlr_pi_tmp = NULL; |
134 | u32 status = 0; | 134 | int status = 0; |
135 | 135 | ||
136 | status = clk_freq_controller_construct_super(g, ppboardobj, | 136 | status = clk_freq_controller_construct_super(g, ppboardobj, |
137 | size, pargs); | 137 | size, pargs); |
@@ -161,7 +161,7 @@ static struct clk_freq_controller *clk_clk_freq_controller_construct( | |||
161 | void *pargs) | 161 | void *pargs) |
162 | { | 162 | { |
163 | struct boardobj *board_obj_ptr = NULL; | 163 | struct boardobj *board_obj_ptr = NULL; |
164 | u32 status = 0; | 164 | int status = 0; |
165 | 165 | ||
166 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_FREQ_CONTROLLER_TYPE_PI) { | 166 | if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_FREQ_CONTROLLER_TYPE_PI) { |
167 | return NULL; | 167 | return NULL; |
@@ -177,10 +177,10 @@ static struct clk_freq_controller *clk_clk_freq_controller_construct( | |||
177 | } | 177 | } |
178 | 178 | ||
179 | 179 | ||
180 | static u32 clk_get_freq_controller_table(struct gk20a *g, | 180 | static int clk_get_freq_controller_table(struct gk20a *g, |
181 | struct clk_freq_controllers *pclk_freq_controllers) | 181 | struct clk_freq_controllers *pclk_freq_controllers) |
182 | { | 182 | { |
183 | u32 status = 0; | 183 | int status = 0; |
184 | u8 *pfreq_controller_table_ptr = NULL; | 184 | u8 *pfreq_controller_table_ptr = NULL; |
185 | struct vbios_fct_1x_header header = { 0 }; | 185 | struct vbios_fct_1x_header header = { 0 }; |
186 | struct vbios_fct_1x_entry entry = { 0 }; | 186 | struct vbios_fct_1x_entry entry = { 0 }; |
@@ -324,9 +324,9 @@ done: | |||
324 | return status; | 324 | return status; |
325 | } | 325 | } |
326 | 326 | ||
327 | u32 clk_freq_controller_pmu_setup(struct gk20a *g) | 327 | int clk_freq_controller_pmu_setup(struct gk20a *g) |
328 | { | 328 | { |
329 | u32 status; | 329 | int status; |
330 | struct boardobjgrp *pboardobjgrp = NULL; | 330 | struct boardobjgrp *pboardobjgrp = NULL; |
331 | 331 | ||
332 | nvgpu_log_info(g, " "); | 332 | nvgpu_log_info(g, " "); |
@@ -343,7 +343,7 @@ u32 clk_freq_controller_pmu_setup(struct gk20a *g) | |||
343 | return status; | 343 | return status; |
344 | } | 344 | } |
345 | 345 | ||
346 | static u32 _clk_freq_controller_devgrp_pmudata_instget(struct gk20a *g, | 346 | static int _clk_freq_controller_devgrp_pmudata_instget(struct gk20a *g, |
347 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, | 347 | struct nv_pmu_boardobjgrp *pmuboardobjgrp, |
348 | struct nv_pmu_boardobj **ppboardobjpmudata, | 348 | struct nv_pmu_boardobj **ppboardobjpmudata, |
349 | u8 idx) | 349 | u8 idx) |
@@ -366,7 +366,7 @@ static u32 _clk_freq_controller_devgrp_pmudata_instget(struct gk20a *g, | |||
366 | return 0; | 366 | return 0; |
367 | } | 367 | } |
368 | 368 | ||
369 | static u32 _clk_freq_controllers_pmudatainit(struct gk20a *g, | 369 | static int _clk_freq_controllers_pmudatainit(struct gk20a *g, |
370 | struct boardobjgrp *pboardobjgrp, | 370 | struct boardobjgrp *pboardobjgrp, |
371 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) | 371 | struct nv_pmu_boardobjgrp_super *pboardobjgrppmu) |
372 | { | 372 | { |
@@ -375,7 +375,7 @@ static u32 _clk_freq_controllers_pmudatainit(struct gk20a *g, | |||
375 | pboardobjgrppmu; | 375 | pboardobjgrppmu; |
376 | struct clk_freq_controllers *pcntrs = | 376 | struct clk_freq_controllers *pcntrs = |
377 | (struct clk_freq_controllers *)pboardobjgrp; | 377 | (struct clk_freq_controllers *)pboardobjgrp; |
378 | u32 status = 0; | 378 | int status = 0; |
379 | 379 | ||
380 | status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); | 380 | status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu); |
381 | if (status) { | 381 | if (status) { |
@@ -391,9 +391,9 @@ done: | |||
391 | return status; | 391 | return status; |
392 | } | 392 | } |
393 | 393 | ||
394 | u32 clk_freq_controller_sw_setup(struct gk20a *g) | 394 | int clk_freq_controller_sw_setup(struct gk20a *g) |
395 | { | 395 | { |
396 | u32 status = 0; | 396 | int status = 0; |
397 | struct boardobjgrp *pboardobjgrp = NULL; | 397 | struct boardobjgrp *pboardobjgrp = NULL; |
398 | struct clk_freq_controllers *pclk_freq_controllers; | 398 | struct clk_freq_controllers *pclk_freq_controllers; |
399 | struct avfsfllobjs *pfllobjs = &(g->clk_pmu.avfs_fllobjs); | 399 | struct avfsfllobjs *pfllobjs = &(g->clk_pmu.avfs_fllobjs); |