gpu: nvgpu: Port clkdomain & clkprog from chips_a

Update clk_domain_3x_prog,
Add vbios hal entry for GV100
Add stubbing in place of boardobj_interfaces.

Change-Id: Id880f303f40a07a6bf2a7f4f21d612124e89fe03
Signed-off-by: Vaikundanathan S <vaikuns@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1660697
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Tested-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 11 insertions, 5 deletions

diff --git a/drivers/gpu/nvgpu/clk/clk_domain.h b/drivers/gpu/nvgpu/clk/clk_domain.h
index 5374d643..4c4a0de2 100644
--- a/drivers/gpu/nvgpu/clk/clk_domain.h
+++ b/drivers/gpu/nvgpu/clk/clk_domain.h
@@ -1,5 +1,5 @@
 /*
-* Copyright (c) 2016-2017, NVIDIA CORPORATION.  All rights reserved.
+* Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
 *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -29,6 +29,10 @@
 #include "boardobj/boardobjgrp_e32.h"
 #include "boardobj/boardobjgrpmask.h"
 
+#define CLK_DOMAIN_BOARDOBJGRP_VERSION 0x30
+#define CLK_TABLE_HAL_ENTRY_GP 0x02
+#define CLK_TABLE_HAL_ENTRY_GV 0x03
+
 struct clk_domains;
 struct clk_domain;
 
@@ -57,10 +61,12 @@ struct clk_domains {
         u8 version;
         bool b_enforce_vf_monotonicity;
         bool b_enforce_vf_smoothening;
+        bool b_override_o_v_o_c;
+        bool b_debug_mode;
         u32 vbios_domains;
+        u16 cntr_sampling_periodms;
         struct boardobjgrpmask_e32 prog_domains_mask;
         struct boardobjgrpmask_e32 master_domains_mask;
-        u16 cntr_sampling_periodms;
         struct ctrl_clk_clk_delta  deltas;
 
         struct clk_domain *ordered_noise_aware_list[CTRL_BOARDOBJ_MAX_BOARD_OBJECTS];
@@ -96,13 +102,13 @@ struct clk_domain_3x_prog {
         struct clk_domain_3x super;
         u8  clk_prog_idx_first;
         u8  clk_prog_idx_last;
-        u8 noise_unaware_ordering_index;
-        u8 noise_aware_ordering_index;
         bool b_force_noise_unaware_ordering;
-        int factory_offset_khz;
+        struct ctrl_clk_freq_delta factory_delta;
         short freq_delta_min_mhz;
         short freq_delta_max_mhz;
         struct ctrl_clk_clk_delta deltas;
+        u8 noise_unaware_ordering_index;
+        u8 noise_aware_ordering_index;
 };
 
 struct clk_domain_3x_master {